如何找到多环形数据路径的关键路径 /最大时钟速率？
我想知道如何在多环形数据台上完成指令所花费的最长时间。我了解加载单词是最长的指令，但是我听说过计算指令所需时间的过程在多环形数据pat径中有所不同。我听说最大时间不是取决于关键道路，而是在关键阶段。有人可以帮忙/澄清一下吗？非常感谢！
I was wondering how to obtain the longest time it takes for an instruction to complete in a multicycle datapath. I understand Load word is the longest instruction, but I have heard that the process for calculating the time it takes for an instruction differs in multicycle datapaths. I have heard that the max time depends not on the critical path, but on the critical stage. Can someone please help/clarify this? Much appreciated!
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（1）
关键路径是在任何1个周期中可能发生的最长计算，它将决定最大时钟速率（每秒循环）和周期时间/持续时间 - 假设所有周期都简单地共享相同的时钟＆amp＆amp;时钟速率，这是一个合理的假设。
（不同的循环速度和异步/未锁定逻辑是相当高级的主题，大概在这里不适用。）
在多环形处理器上，单个说明被分为多个运行不同硬件的周期，因此应检查每个周期（数据检查）（datapaths）确定哪个在临界路径上。＆nbsp;需要检查的一组循环是所有可能的指令的所有可能的周期，而不仅仅是负载。
例如，即使负载指令可能是由于高周期数（例如5）而可能是最慢的总体指令（例如，其他指令类型（例如，周期计数为4），也可能具有更长的关键路径它的循环可能会限制整个处理器的最大时钟速率。
所有指令完成完成的最大完成时间是通过首先添加每种不同类型的指令的周期数来计算的，在其中最大化，然后乘以按照上述确定的单个循环的持续时间。
如果我们想提高时钟速率，我们将确定临界路径周期附近的周期，并有可能将顶部或顶部几个分为两个循环。＆nbsp;然后，最大时钟速率将上升（周期时间将降低）至没有分裂的其他周期的极限。
在给定的工作量上的分析可以证明这是否会导致净改进，因为性能的任何变化是获得的任何周期时间改善之间的权衡，而某些某些指令（S）现在有一个周期（尽管周期比以前更快。＆nbsp;不同的工作量/程序肯定会在改进分析中产生不同的特定答案。
The critical path is the longest computation that could happens in any 1 cycle, and that will determine the max clock rate (cycles per second) and also cycle time/duration — assuming all cycles simply share the same clock & clock rate, which is a reasonable assumption.
(Varying cycle speeds and asynchronous/unclocked logic are pretty advanced subjects and presumably not applicable here.)
On a multicycle processor, single instructions are split into multiple cycles running different pieces of hardware, so each of those cycles (datapaths) should be examined to determine which is on the critical path. The set of cycles that needs to be examined is all possible cycles for all possible instructions, not just for loads.
For example, even though the load instructions is likely the slowest overall instruction because of a high cycle count (e.g. 5), some other instruction type, say multiply (e.g. with cycle count of 4), might have a longer critical path on one of its cycles that could limit the max clock rate for the whole processor.
The max time to completion for all instructions is calculated by first adding up the number of cycles for each different type of instruction, taking the max among them, and then multiplying by the duration of a single cycle determined as per the above.
If we want to improve the clock rate, we identify the cycles near the critical path cycle and potentially split the top one or top several each into two cycles. The max clock rate then will rise (cycle time will lower) to the limit of some other cycle that wasn't split.
An analysis, on a given workload, could tell if this results in a net improvement or not, since any change in performance is a trade off between whatever cycle time improvement is obtained versus that some certain instruction(s) have now one more cycle (albeit a faster cycle) than before. Different workloads/programs will most certainly yield different specific answers in such analysis as to improvement.