我在Verilog中写了此代码，没有错误消息，但是它没有工作
这是模块：
module test (output reg [7:0] Q_out, input [2:0] data_in);
always
begin
case (data_in)
3'b000: Q_out = 8'b10000000;
3'b001: Q_out = 8'b01000000;
3'b010: Q_out = 8'b00100000;
3'b011: Q_out = 8'b00010000;
3'b100: Q_out = 8'b00001000;
3'b101: Q_out = 8'b00000100;
3'b110: Q_out = 8'b00000010;
3'b111: Q_out = 8'b00000001;
endcase
end
endmodule
这是测试台的
module test2();
reg [2:0]data_in;
wire [7:0] Q_out;
test uut (.data_in(data_in), .Q_out(Q_out));
initial begin
data_in=000;
#5;
data_in=001;
#5;
data_in=010;
#5;
data_in=011;
#5;
data_in=100;
#5;
data_in=101;
#5;
data_in=110;
#5;
data_in=111;
#5;
end
endmodule
一切似乎都起作用，直到我到达仿真部分。
然后，在我尝试模拟它之后，没有真正出现在波形中。有什么问题？
This is the module:
module test (output reg [7:0] Q_out, input [2:0] data_in);
always
begin
case (data_in)
3'b000: Q_out = 8'b10000000;
3'b001: Q_out = 8'b01000000;
3'b010: Q_out = 8'b00100000;
3'b011: Q_out = 8'b00010000;
3'b100: Q_out = 8'b00001000;
3'b101: Q_out = 8'b00000100;
3'b110: Q_out = 8'b00000010;
3'b111: Q_out = 8'b00000001;
endcase
end
endmodule
and this is the testbench
module test2();
reg [2:0]data_in;
wire [7:0] Q_out;
test uut (.data_in(data_in), .Q_out(Q_out));
initial begin
data_in=000;
#5;
data_in=001;
#5;
data_in=010;
#5;
data_in=011;
#5;
data_in=100;
#5;
data_in=101;
#5;
data_in=110;
#5;
data_in=111;
#5;
end
endmodule
Everything seems to work until I get to the simulation part.
Then, after I try to simulate it, nothing really shows up in waveforms. What could be the problem?
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评论（1）
您在
test模块中具有无限循环。更改：
TO：
由于您的
总是没有延迟块，因此它会在时间0触发，并且时间不会在模拟中推进。通过添加灵敏度列表（@*），仅在任何一个输入（data_in）会更改状态时，该块仅触发。您也可以使用
ewndy_comb。请参阅IEEE STD 1800-2017，第9.2.2.2.2节 ewansewans_comb与始终 @*相比You have an infinite loop in the
testmodule.Change:
to:
Since there is no delay in your
alwaysblock, it keeps triggering at time 0, and time does not advance in the simulation. By adding a sensitivity list (@*), the block only triggers when any of it inputs (data_in) changes state.You could also use
always_comb. Refer to IEEE Std 1800-2017, section 9.2.2.2.2 always_comb compared to always @*