如何在两个不同的过程中更改一个信号的值？在VHDL中

发布于 2025-01-24 09:29:54 字数 1081 浏览 0 评论 0原文

我正在尝试为不同的协议进行状态机，以将每个协议链接在一起，每个协议在VHDL中都有自己的过程。我想将“ 1”分配给一个信号，在另一个过程中，我应该分配“ 0”。例如，在第一个过程中，当我分配“ 1”时，它开始写作，在分配'0'的第二个过程中，它停止写作。

我尝试了不同的事情，但是什么都没有起作用。我不断遇到这个错误，

Error (10028): Can't resolve multiple constant drivers for net at

有办法可以解决这个问题吗？

当wb_do_write＆lt; ='1';分配给'1'时，第一个的代码开始从一个协议写入数据，这

是第一个过程，

elsif (ss_reg(2 downto 1)="01")   then    -- device is deactivated
  --  MISO <= 'Z';
        o_data <= shift_reg;   -- save the recieved byte when transmision ends
        wb_do_write <= '1';
    
        o_data_valid <= '1';
   
      end if;

是第一个进程wb_do_write ＆lt; ='1';应分配回零，以便停止写作是

第二个过程

WHEN WB_WRITE =>
            IF wb_ack_i = '1' THEN
              wb_complete <= '1';
              wb_stb_o    <= '0';
              wb_cyc_o    <= '0';
            --wb_do_write <= '0' ; here is the problem, I can't assign this signal again to '0'
              wb_state <= WB_FINISH;
            END IF;

原文

I am trying to do a state machine for different protocols that link together, each protocol has its own process in VHDL. I want to assign '1' to one signal and in the other process I should assign '0'. For example in the first process when I assign '1' it starts writing and in the second process when I assign '0' it stops writing.

I tried different things but nothing is working. I keep getting this error

Error (10028): Can't resolve multiple constant drivers for net at

is there a way that I can work around this issue?

The code for the first when wb_do_write <= '1'; assign to '1' and it starts writing the data from one protocol to another is

this is the first process

elsif (ss_reg(2 downto 1)="01")   then    -- device is deactivated
  --  MISO <= 'Z';
        o_data <= shift_reg;   -- save the recieved byte when transmision ends
        wb_do_write <= '1';
    
        o_data_valid <= '1';
   
      end if;

the code where wb_do_write <= '1'; should be assigned back to zero so it stops writing is

this is the second process

WHEN WB_WRITE =>
            IF wb_ack_i = '1' THEN
              wb_complete <= '1';
              wb_stb_o    <= '0';
              wb_cyc_o    <= '0';
            --wb_do_write <= '0' ; here is the problem, I can't assign this signal again to '0'
              wb_state <= WB_FINISH;
            END IF;

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