如何修复“错误：std_ulogic类型的预期表达”？

Question

我正在学习VHDL，我尝试用两个文件来实现“ adder_array_generic_tree”，第一个文件“ user_defined_type_pkg.vhd” contanct：and contance：

library IEEE;
use ieee.numeric_std.all;

package user_defined_type_pkg is
    type signed_vector is array (natural range<>) of signed;
end package;

and第二文件“ adder_array_generic_tree.vhd”包含：

library IEEE;
use IEEE.numeric_std.all;
use ieee.math_real.all;
use work.user_defined_type_pkg.all;

entity adder_array_generic_tree is
    generic (
        NUM_INPUTS: natural := 10;
        NUM_BITS: natural := 7);
    port (
        x: in signed_vector(0 to NUM_INPUTS-1)(NUM_BITS-1 downto 0);
        sum: out signed(NUM_BITS + integer(ceil(log2(real(NUM_INPUTS))))-1 downto 0));
end adder_array_generic_tree;

architecture tree_type_generic of adder_array_generic_tree is
    constant LAYERS: natural := integer(ceil(log2(real(NUM_INPUTS))));
    constant PWR_OF_TWO: natural := 2**LAYERS;
    alias EXTRA_BITS: natural is LAYERS;
begin
    process (all)
        variable accum: signed_vector(0 to PWR_OF_TWO-1)(NUM_BITS+EXTRA_BITS-1 downto 0);
    begin
        loop1: for i in 0 to NUM_INPUTS-1 loop
            accum(i) := resize(x(i), NUM_BITS+EXTRA_BITS);
        end loop loop1;
        accum(NUM_INPUTS to PWR_OF_TWO-1) := (others => (others => '0'));
        
        loop2: for j in 1 to LAYERS loop
            loop3: for i in 0 to PWR_OF_TWO/(2**j)-1 loop
                accum(i) := accum(2*i) + accum(2*i+1);
            end loop loop3;
        end loop loop2;
        sum <= accum(0);
    end process;
end tree_type_generic;

但是，第二个问题是 ：文件：

accum(NUM_INPUTS to PWR_OF_TWO-1) := (others => (others => '0'));

'0'在上划线的Vivado红色，说“错误：std_ulogic类型的预期表达”。该文件类型是VHDL 2008，XA7S6CPGA196-2I被采用。

Answer 1

您没有包含软件包ieee.std_logic_1164，因此std_ulogic看不到。 '0'的唯一可见选项是contrac或bit来自std.Standard.Standard软件包，因此，错误AS ieee.numeric_std.signed是ieee.std_logic_1164.std_logic的数组。

要修复，只需添加行：

use ieee.std_logic_1164.all

在文件的顶部。