mips max移动地址J指令
在课堂上，据说通过将两个0位附加到末端，而前面的PC中有四个MSB来编码J指令的地址部分。
但是，我不明白的一件事是附加了4个MSB的部分。
如果当前的PC为0x20000000，依此类推。
如果给出了命令j 0x3ffffff，那么J到达的最终地址是00101111 .... 11100带有PC的前4位，0010，然后是两个0位？
j 0x3ffffff
0x3fffff
-> convert to binary
11111111111111111111111111
-> add two zero bits at the end. (<< 2)
1111111111111111111111111100
-> add PC's four MSB bits.
00101111111111111111111111111100 <- Is this right encoding???
In class, it was said that the bit of the address part of the j instruction is encoded by appending two 0 bits to the end and four MSBs from the PC in front.
However, one thing I don't understand is the part where 4 MSBs are attached.
If the current PC is 0x20000000 and so on.
If the command j 0x3ffffff is given, will the final address that j arrives at is 00101111....11100 with the first 4 bits of the PC, 0010, followed by two 0 bits?
j 0x3ffffff
0x3fffff
-> convert to binary
11111111111111111111111111
-> add two zero bits at the end. (<< 2)
1111111111111111111111111100
-> add PC's four MSB bits.
00101111111111111111111111111100 <- Is this right encoding???
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不，这不是编码 - 这只是一个地址 1 ，一个潜在的PC值，也就是分支目标，值0x2fffffffc。
我们将术语编码用于字段编码（多个字段）的数据，作为地址，这只是一个单个值。
指令是一种常见的典型用途。
j指令的编码将具有6个opcode位，值0x2和26位，因此将其编码为两个字段：并且该编码的指令将到达您上面提到的分支目标地址，假设PC已经在0010范围内（其上位为0010）。
询问您的假设的一种好方法是避免汇编器和汇编器语法，并说出类似的话：＆nbsp;假设PC具有0010的上限4位，并且我们要分支到位置0x2ffffffc，我们如何编码指令，反之亦然，例如，我们处理器执行0x0bffffff（编码指令的单个值），PC具有上限4位0010，它将分支到什么地址？
考虑组装程序的原因是，每个体系结构都有多个汇编器（潜在的）；例如，MIPS至少具有3.＆nbsp;火星汇编程序甚至不会为
j指令的操作数进行数字参数。＆nbsp;因此，组装线的语法和含义在假设的情况下抛出了另一组手册。1 ＆nbsp;我们可以将地址分解为字段吗？＆nbsp;是的，当然。＆nbsp;低两个位必须是均匀的，因此我们可以说这是一个字段，并且在执行
j键入指令时，高4位被消耗掉，所以这是一个字段。＆nbsp;此外，如果您进入缓存操作，则在缓存查找中分解一个地址为标签，索引，块偏移量 - 这些字段却不同；地址也被视为在虚拟地址转换为物理地址的翻译中编码的字段。＆nbsp;我们仍然最常将地址称为（简单的未编码，单个）值。No, this is not an encoding — this is simply an address1, a potential pc value, aka a branch target, value 0x2FFFFFFC.
We use the term encoding for data that field encoded (multiple fields) — and as an address this is simply a single value.
One common and typical use for encoding is instructions.
The encoding for a
jinstruction would have 6 opcode bits, value 0x2, and 26 bit immediate, so encode as two fields:And this encoded instruction will reach the branch target address you mention above, assuming the pc is already in the 0010 range (its upper bits are 0010).
A good way to ask your hypothetical would be to avoid the assembler and assembler syntax altogether, and say something like: Assuming the pc has upper 4 bits of 0010 and we want to branch to location 0x2FFFFFFC, how do we encode the instruction, and/or vice versa let's say we processor executes 0x0BFFFFFF (the single value of the encoded instruction) with the PC having upper 4 bits of 0010, what address will it branch to?
A reason to factor out the assembler is because there are multiple assemblers for each architecture (potentially); MIPS, for example, has at least 3. The MARS assembler won't even take a numeric argument for the operand of a
jinstruction. So, the syntax and meaning of lines of assembly throws another set of manuals at the hypothetical.1 Can we break down an address into fields? Yes, of course. The low two bits must be even, so we can argue that is a field, and, the high 4 bits are consumed in execution of
jtype instructions, so that's a field. Further, if you get into cache operation, an address is decomposed in cache lookup into tag, index, block offset — which are yet different fields; addresses are also viewed as field encoded in translation of virtual addresses to physical. Still we would most normally call an address a (simple unencoded, single) value.