如何计算特定尺寸的内存
我想设计一个4kb的内存。 存储器的大小等于 2^m 个字或 2^m*n 个位，m 为地址线，n 为数据线。
在verilog中我们可以写
reg [WordSize-1:0] Mem [0:Address_width];
对于 4kb 内存，Wordsize 的值是多少，Address_width 的值是多少，我们如何计算它？
I would like to design a 4kb memory.
The size of a memory is equal to 2^m words or 2^m*n bits, m for address lines n for data lines.
In verilog we can write
reg [WordSize-1:0] Mem [0:Address_width];
For 4kb memory what is the values of Wordsize and what for Address_width, how do we compute it?
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我认为更好的名称是
WIDTH和DEPTH，因为这将更好地定义内存。所以你的声明是：这给你一个
WIDTHxDEPTH的内存。大多数情况下，您知道宽度。例如，如果您尝试存储字节，则您的WIDTH为 8。这是您选择的第一个参数。然后你自己想想你需要存储多少个单词，这将决定你的深度。您很少从内存大小开始然后倒退，我想不出您想以这种方式思考的情况。假设您想要设计 WIDTH = 8 和 DEPTH = 1024，那么这是一个 8 kb 内存，只需将宽度和深度相乘即可。
附带说明一下，访问
DEPTH深度的内存所需的地址宽度可以通过深度的 log-base-2 来计算。例如，如果深度为 1024，则地址宽度将为 10 位宽（因为 2^10 = 1024）。在代码中：这就是我建议动态调整地址大小的方法。
I think better names are
WIDTHandDEPTH, as this will better define the memory. So your declaration would be:This gives you a memory that is
WIDTHxDEPTH. Most often, you know the width. For example if you're trying to store bytes, then yourWIDTHis 8. This is the first parameter you select. Then you think to yourself how many words you're going to need to store, which will set your depth. Rarely do you start with the memory size and go backwards, I can't think of a situation in which you want to think this way.So let's say you want to design WIDTH = 8 and DEPTH = 1024, then that's an 8 kb memory, just multiply width and depth together.
As a side note, the width of the address that you need to access a memory that is
DEPTHdeep can be calculated by the log-base-2 of the depth. For example, if you have 1024 deep, your address width would be 10 bits wide (since 2^10 = 1024). In code:This is how I recommend sizing your address dynamically.