如何计算寄存器复位值?
我在寄存器模型中定义了寄存器,如下所示。
virtual function void build();
this.PM_CAP_ID = uvm_reg_field::type_id::create("PM_CAP_ID",,get_full_name());
this.PM_CAP_ID.configure(this, 8, 0, "RO", 0, 8'h1, 1, 0, 1);
this.PM_NEXT_POINTER = uvm_reg_field::type_id::create("PM_NEXT_POINTER",,get_full_name());
this.PM_NEXT_POINTER.configure(this, 8, 8, "RO", 0, 8'h50, 1, 0, 1);
this.PM_SPEC_VER = uvm_reg_field::type_id::create("PM_SPEC_VER",,get_full_name());
this.PM_SPEC_VER.configure(this, 3, 16, "RO", 0, 3'h3, 1, 0, 0);
this.PME_CLK = uvm_reg_field::type_id::create("PME_CLK",,get_full_name());
this.PME_CLK.configure(this, 1, 19, "RO", 0, 1'h0, 1, 0, 0);
this.Reserved_20_20 = uvm_reg_field::type_id::create("Reserved_20_20",,get_full_name());
this.Reserved_20_20.configure(this, 1, 20, "RO", 0, 1'h0, 0, 0, 0);
uvm_resource_db#(bit)::set({"REG::", Reserved_20_20.get_full_name()}, "NO_REG_TESTS", 1, this);
uvm_resource_db#(bit)::set({"REG::", Reserved_20_20.get_full_name()}, {Reserved_20_20.get_full_name(), "_NO_REG_TESTS"}, 1, this);
this.DSI = uvm_reg_field::type_id::create("DSI",,get_full_name());
this.DSI.configure(this, 1, 21, "RO", 0, 1'h0, 1, 0, 0);
this.AUX_CURR = uvm_reg_field::type_id::create("AUX_CURR",,get_full_name());
this.AUX_CURR.configure(this, 3, 22, "RO", 0, 3'h7, 1, 0, 0);
this.D1_SUPPORT = uvm_reg_field::type_id::create("D1_SUPPORT",,get_full_name());
this.D1_SUPPORT.configure(this, 1, 25, "RO", 0, 1'h1, 1, 0, 0);
this.D2_SUPPORT = uvm_reg_field::type_id::create("D2_SUPPORT",,get_full_name());
this.D2_SUPPORT.configure(this, 1, 26, "RO", 0, 1'h1, 1, 0, 0);
this.PME_SUPPORT = uvm_reg_field::type_id::create("PME_SUPPORT",,get_full_name());
this.PME_SUPPORT.configure(this, 5, 27, "RO", 1, 5'h1b, 1, 0, 0);
uvm_resource_db#(bit)::set({"REG::", PME_SUPPORT.get_full_name()}, "NO_REG_BIT_BASH_TEST", 1, this);
uvm_resource_db#(bit)::set({"REG::", PME_SUPPORT.get_full_name()}, {PME_SUPPORT.get_full_name(), "_NO_REG_BIT_BASH_TEST"}, 1, this);
endfunction: build
在配置中,左起第六个位置给出了重置值。如何组合各个字段的所有这些重置值并得出最终值?
I have register defined inside a register model as shown below
virtual function void build();
this.PM_CAP_ID = uvm_reg_field::type_id::create("PM_CAP_ID",,get_full_name());
this.PM_CAP_ID.configure(this, 8, 0, "RO", 0, 8'h1, 1, 0, 1);
this.PM_NEXT_POINTER = uvm_reg_field::type_id::create("PM_NEXT_POINTER",,get_full_name());
this.PM_NEXT_POINTER.configure(this, 8, 8, "RO", 0, 8'h50, 1, 0, 1);
this.PM_SPEC_VER = uvm_reg_field::type_id::create("PM_SPEC_VER",,get_full_name());
this.PM_SPEC_VER.configure(this, 3, 16, "RO", 0, 3'h3, 1, 0, 0);
this.PME_CLK = uvm_reg_field::type_id::create("PME_CLK",,get_full_name());
this.PME_CLK.configure(this, 1, 19, "RO", 0, 1'h0, 1, 0, 0);
this.Reserved_20_20 = uvm_reg_field::type_id::create("Reserved_20_20",,get_full_name());
this.Reserved_20_20.configure(this, 1, 20, "RO", 0, 1'h0, 0, 0, 0);
uvm_resource_db#(bit)::set({"REG::", Reserved_20_20.get_full_name()}, "NO_REG_TESTS", 1, this);
uvm_resource_db#(bit)::set({"REG::", Reserved_20_20.get_full_name()}, {Reserved_20_20.get_full_name(), "_NO_REG_TESTS"}, 1, this);
this.DSI = uvm_reg_field::type_id::create("DSI",,get_full_name());
this.DSI.configure(this, 1, 21, "RO", 0, 1'h0, 1, 0, 0);
this.AUX_CURR = uvm_reg_field::type_id::create("AUX_CURR",,get_full_name());
this.AUX_CURR.configure(this, 3, 22, "RO", 0, 3'h7, 1, 0, 0);
this.D1_SUPPORT = uvm_reg_field::type_id::create("D1_SUPPORT",,get_full_name());
this.D1_SUPPORT.configure(this, 1, 25, "RO", 0, 1'h1, 1, 0, 0);
this.D2_SUPPORT = uvm_reg_field::type_id::create("D2_SUPPORT",,get_full_name());
this.D2_SUPPORT.configure(this, 1, 26, "RO", 0, 1'h1, 1, 0, 0);
this.PME_SUPPORT = uvm_reg_field::type_id::create("PME_SUPPORT",,get_full_name());
this.PME_SUPPORT.configure(this, 5, 27, "RO", 1, 5'h1b, 1, 0, 0);
uvm_resource_db#(bit)::set({"REG::", PME_SUPPORT.get_full_name()}, "NO_REG_BIT_BASH_TEST", 1, this);
uvm_resource_db#(bit)::set({"REG::", PME_SUPPORT.get_full_name()}, {PME_SUPPORT.get_full_name(), "_NO_REG_BIT_BASH_TEST"}, 1, this);
endfunction: build
In configure
, the 6th position from the left gives the reset value. How to combine all these reset values of individual fields and arrive at a final value?
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您可以使用
uvm_reg
中的函数get_reset()
:例如:
You can use the function
get_reset()
in theuvm_reg
:For example: