控制 make 的详细程度
我正在使用 makefile 来编译由许多 .c 文件组成的程序，并且任何时候 make 被调用时，它只编译上次运行后修改的那些文件（没什么特别的）直到这里）。
为了避免屏幕混乱，我在每个 $(CC) 调用的开头添加 @，并在其之前打印一条自定义的 echo 消息。例如：
%.o: %.c $(h1) $(h3) %.h
@echo -e "\tCompiling <" $<
@$(CC) $(CFLAGS) -c $< -o $(libDir)$@$(MATHOPTS)
我的问题是：如何以更“动态的方式”控制 make 的详细程度，以便能够：
- 正常行为：仅自定义为每个执行的 makefile 规则打印消息。
- 详细行为：打印每个 makefile 规则实际执行的命令（就好像根本没有使用
@）。
I'm using a makefile to compile a program made of many .c files, and any time make is invoked it only compiles those files modified after the last run (nothing special until here).
To avoid cluttering my screen, I prepend @ at the beginning of each $(CC) call, and before it I print a customized echo message. For example:
%.o: %.c $(h1) $(h3) %.h
@echo -e "\tCompiling <" lt;
@$(CC) $(CFLAGS) -c lt; -o $(libDir)$@$(MATHOPTS)
My question is: how can I control the verbosity of make in a more "dynamic way", in order to be able to:
- Normal behaviour: only a customized message is printed for every makefile rule executed.
- Verbose behaviour: print the command actually executed by every makefile rule (as if the
@wasn't used at all).
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我会按照 automake 的方式来做：
如果您需要在规则中执行其他命令，我喜欢下面的代码片段。写
$(AT)而不是@，当V=0时不显示，而当V=1时打印>。I'd do it the way automake does:
If you need to execute other commands in your rules, I like the following snippet. Write
$(AT)instead of@and it will be silent whenV=0but printed whenV=1.另一种解决方案（我喜欢它，因为它很灵活）
您可以跳过 vecho 内容，但它有时确实会派上用场。
Another solution (one which I like because it's flexible)
You can skip the vecho stuff, but it does come in handy at times.
您可以省略“@”并将“-s”选项传递给 make 命令，而不是使用“@gcc”进行编译。 （保留“@echo”原样。）然后“make -s”将是简短的 make 命令，“make”将是详细命令。
来自 GNU Make 手册页
（其他答案更好回答你的问题，但这种方法值得一提。）
Instead of using "@gcc" to compile, you can omit that "@" and pass the "-s" option to your make command instead. (Leave "@echo" as it is.) Then "make -s" would be your brief make command, and "make" would be verbose.
From the GNU Make manual pages
(The other answers better answer your question, but this approach deserves a mention.)
我将创建一个函数，它接受一个命令来执行并决定是否回显它。
那么普通
make调用的结果将类似于：而
make V=1将给出：I would create a function which takes a command to execute and decides whether to echo it.
Then the result of plain
makeinvocation will be something like:Whereas
make V=1will give:由于我无法评论
AT = $(AT_$(V))建议，请注意 Automake 确实提供了一个标准宏，其功能与AT相同，称为AM_V_at。您还会发现它还有另一个非常有用的
AM_V_GEN变量，该变量要么解析为空，要么解析为@echo " GEN " $@;，具体取决于详细程度。这允许您编写如下代码：
其输出将是（禁用详细程度）：
或（启用详细程度）：
非常方便，这消除了定义您自己的宏的需要。
Since I can't comment on the
AT = $(AT_$(V))suggestion, note that Automake does provide a standard macro that does the same thing asAT, which is calledAM_V_at.You will also find that it has another very useful
AM_V_GENvariable, that resolves either to nothing or to@echo " GEN " $@;, depending on the verbosity.This allows you to code something like this:
The output of which will be either (verbosity disabled):
or (verbosity enabled):
Pretty convenient, and this removes the need to define your own macros.