8086/8088中有多少个寄存器?

发布于 2025-01-02 04:25:32 字数 434 浏览 6 评论 0原文

我参加了计算机体系结构课程,了解到处理器有 32 个寄存器,每个寄存器都是 32 位。现在我正在学习计算机体系结构课程,其中我读到8086只有只有8个寄存器。但是我读过的书 网站显示了许多寄存器。我对 8086 和 8088 中的寄存器感到困惑。请帮助我。

注意:

我对不同处理器中的不同寄存器大小有很好的理解。我只是对寄存器的数量感到困惑。

I took Computer Architecture course and I understood that processor has 32 registers each of 32 bit. Now I am studying computer architecture course in which I read that 8086 has 8 registers only. But the book I read and this website shows many registers. I am getting confused about the registers in 8086 and 8088. Please help me out.

NOTE:

I have a good understanding of different register sizes in different processors. I am just getting confused in the number of registers.

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会发光的星星闪亮亮i 2025-01-09 04:25:32

8086 和 8088 是 16 位处理器 - 它们的寄存器宽度均为 16 位。 (一些指令将 DX 和 AX 的组合视为 32 位整数,如 div 输入和 mul 输出。)

请注意,8086 有 16 位数据总线; 8088 有一个 8 位数据总线。 (因此加载/存储 16 位字需要 2 个总线周期。两者的地址仍然是 20 位。)

您的网站链接是准确的;以下是其中的复制/粘贴,并进行了一些轻微的编辑:

通用寄存器

8086 CPU有8个通用寄存器,每个寄存器都有自己的
名称:

AX——累加器寄存器(分为AH/AL):

生成最短的机器代码:存在短格式编码
算术、逻辑和数据传输
AL 或 AX 中必须有一个数字
乘法与分配
输入&输出

BX——基址寄存器(分为BH/BL)。

默认相对于DS的偏移地址   

CX——计数寄存器(分为CH/CL):

LOOP指令隐式地将其用作计数器
使用 REP 命令对字符串进行重复操作
计数(以 CL 为单位)要移位和循环的位数   

DX——数据寄存器(分为DH/DL):

DX:AX 连接到 32 位寄存器以进行某些 MUL 和 DIV 操作
在某些 IN 和 OUT 操作中指定端口   

SI - 源索引寄存器:

可用于数据的指针寻址
用作某些字符串处理指令的源
默认相对于DS的偏移地址   

DI - 目标索引寄存器:

可用于数据的指针寻址
在某些字符串处理指令中用作目标,如 ES:DI
字符串指令之外相对于 DS 的偏移地址

BP - 基指针:

主要用于访问堆栈上的参数和局部变量
相对于SS的偏移地址

SP - 堆栈指针:

始终指向堆栈顶部的项目
相对于SS的偏移地址(但不能用于16位寻址模式)
应始终指向字(偶地址处的字节)
空堆栈的 SP = FFFEh

段寄存器

  • CS - 指向包含当前程序的段。
  • DS - 通常指向定义变量的段。
  • ES - 额外的段寄存器,由编码人员定义其用法。
  • SS - 指向包含堆栈的段。

虽然可以在段寄存器中存储任何数据,
这绝不是一个好主意。段寄存器有一个非常特殊的
目的 - 指向可访问的内存块。

段寄存器与通用寄存器一起工作
访问任何内存值。例如,如果我们想访问内存
在物理地址12345h(十六进制),我们可以设置DS =
1230h 且 SI = 0045h。这样我们就可以形成20位线性地址,
而不是仅使用单个寄存器的 16 位。 (这适用于实际
模式;在保护模式下分段是不同的。)

CPU通过乘以物理地址来计算物理地址
将段寄存器增加 10h 并将通用寄存器添加到其中
(1230 小时 * 10 小时 + 45 小时 = 12345 小时):

由2个寄存器组成的地址称为有效地址。
默认情况下,BX、SI、DI 寄存器与 DS 段寄存器配合使用;血压
SP与SS段寄存器一起工作。其他通用用途
寄存器不能形成有效地址。另外,虽然BX可以
形成有效地址,BH和BL不能。

特殊用途寄存器

IP - 指令指针:

总是指向下一条要执行的指令
相对于CS的偏移地址

IP寄存器总是与CS段寄存器一起工作,它
指向当前正在执行的指令。

标志寄存器

标志寄存器 - 确定处理器的当前状态。他们
CPU经过数学运算后自动修改,这
允许确定结果的类型,并确定
将控制权转移到程序其他部分的条件。
通常,您无法直接访问 FLAGS,除非通过 pushf/popf。存在一些特殊指令来设置/清除某些特定位。

FLAGS 中的状态/条件代码位是:

  • 进位标志 (CF) - 当存在无符号时此标志设置为 1
    溢出。例如,当您添加字节 255 + 1 时(结果不在
    范围 0...255)。当没有溢出时,此标志设置为 0。
  • 奇偶校验标志 (PF) - 当结果(低 8 位)中存在偶数个 1 位时,此标志设置为 1;当结果中有奇数个 1 位时,此标志设置为 0。
  • 辅助标志 (AF) - 当低半字节(4 位)出现无符号溢出(进位)时设置为 1。
  • 零标志 (ZF) - 当结果为零时设置为 1。对于非零结果,此标志设置为 0。
  • 符号标志 (SF) - 当结果为时设置为 1
    消极的。当结果为正时,它被设置为 0。(该标志采用最高有效位的值。)
  • 陷阱标志 (TF) - 用于
    片上调试。
  • 中断启用标志 (IF) - 当此标志设置为 1 时,CPU 对来自外部设备的中断做出反应。
  • 方向标志 (DF) - 这
    某些指令使用 flag 来处理数组。当这个标志
    设置为 0 时,处理向前完成,当该标志设置为 1 时
    处理是向后进行的。
  • 溢出标志 (OF) - 设置为 1
    当有符号溢出时。例如,当您添加字节 100 + 50 时(结果不在 -128...127 范围内)。

The 8086 and 8088 are 16 bit processors - their registers are each 16 bits in width. (A few instructions treat the combination of DX and AX as a 32 bit integer, like div input and mul output.)

Note that the 8086 has 16 bit data bus; the 8088 has an 8 bit data bus. (So loading/storing a 16-bit word takes 2 bus cycles. Addresses are still 20-bit for both.)

The site you linked is accurate; the following is a copy/paste from it with a couple light edits:

GENERAL PURPOSE REGISTERS

8086 CPU has 8 general purpose registers, each register has its own
name:

AX - the accumulator register (divided into AH / AL):

Generates shortest machine code: short-form encodings exist
Arithmetic, logic and data transfer
One number must be in AL or AX
Multiplication & Division
Input & Output

BX - the base address register (divided into BH / BL).

Offset address relative to DS by default   

CX - the count register (divided into CH / CL):

The LOOP instruction uses it implicitly as a counter
Repetitive operations on strings with the REP command
Count (in CL) of bits to shift and rotate   

DX - the data register (divided into DH / DL):

DX:AX concatenated into 32-bit register for some MUL and DIV operations
Specifying ports in some IN and OUT operations   

SI - source index register:

Can be used for pointer addressing of data
Used as source in some string processing instructions
Offset address relative to DS by default   

DI - destination index register:

Can be used for pointer addressing of data
Used as destination in some string processing instructions as ES:DI
Offset address relative to DS outside of string instructions

BP - base pointer:

Primarily used to access parameters and locals on the stack
Offset address relative to SS

SP - stack pointer:

Always points to top item on the stack
Offset address relative to SS (but can't be used in 16-bit addressing modes)
Should always points to word (byte at even address)
An empty stack will have SP = FFFEh

SEGMENT REGISTERS

  • CS - points at the segment containing the current program.
  • DS - generally points at segment where variables are defined.
  • ES - extra segment register, it's up to a coder to define its usage.
  • SS - points at the segment containing the stack.

Although it is possible to store any data in the segment registers,
this is never a good idea. The segment registers have a very special
purpose - pointing at accessible blocks of memory.

Segment registers work together with general purpose register to
access any memory value. For example if we would like to access memory
at the physical address 12345h (hexadecimal), we could set the DS =
1230h and SI = 0045h. This way we can form 20-bit linear addresses,
instead of just 16 bit with a single register. (This applies in real
mode; in protected mode segmentation is different.)

The CPU makes a calculation of the physical address by multiplying the
segment register by 10h and adding the general purpose register to it
(1230h * 10h + 45h = 12345h):

The address formed with 2 registers is called an effective address.
By default BX, SI and DI registers work with DS segment register; BP
and SP work with SS segment register. Other general purpose
registers cannot form an effective address. Also, although BX can
form an effective address, BH and BL cannot.

SPECIAL PURPOSE REGISTERS

IP - the instruction pointer:

Always points to next instruction to be executed
Offset address relative to CS

IP register always works together with CS segment register and it
points to currently executing instruction.

FLAGS REGISTER

Flags Register - determines the current state of the processor. They
are modified automatically by CPU after mathematical operations, this
allows to determine the type of the result, and to determine
conditions to transfer control to other parts of the program.
Generally you cannot access FLAGS directly, except via pushf/popf. Some special instructions exist to set/clear some of the specific bits.

The status / condition-code bits in FLAGS are:

  • Carry Flag (CF) - this flag is set to 1 when there is an unsigned
    overflow. For example when you add bytes 255 + 1 (result is not in
    range 0...255). When there is no overflow this flag is set to 0.
  • Parity Flag (PF) - this flag is set to 1 when there is even number of one bits in (the low 8 bits of a) result, and to 0 when there is odd number of one bits.
  • Auxiliary Flag (AF) - set to 1 when there is an unsigned overflow (carry-out) for low nibble (4 bits).
  • Zero Flag (ZF) - set to 1 when result is zero. For non-zero result this flag is set to 0.
  • Sign Flag (SF) - set to 1 when result is
    negative. When result is positive it is set to 0. (This flag takes the value of the most significant bit.)
  • Trap Flag (TF) - Used for
    on-chip debugging.
  • Interrupt enable Flag (IF) - when this flag is set to 1 CPU reacts to interrupts from external devices.
  • Direction Flag (DF) - this
    flag is used by some instructions to process arrays. When this flag
    is set to 0 the processing is done forward, when this flag is set to 1
    the processing is done backward.
  • Overflow Flag (OF) - set to 1
    when there is a signed overflow. For example, when you add bytes 100 + 50 (result is not in range -128...127).
饭团 2025-01-09 04:25:32

8086有14个16位寄存器。 AX、BX、CX、DX、SI、DI、BP、SP、CS、DS、SS、ES、IP 和标志寄存器。最后两个只能间接访问。

The 8086 has 14 16 bits registers. AX, BX, CX, DX, SI, DI, BP, SP, CS, DS, SS, ES, IP and the flags register. The last two are only accessed indirectly.

呆头 2025-01-09 04:25:32

我参加了计算机体系结构课程,我了解处理器
有 32 个寄存器,每个寄存器都是 32 位。

这并不能回答你的问题,但如果你想与另一位工程师交流,你必须使用正确的语言。说“一个(某些)处理器有 32 个寄存器,大小为 32 位”不会有任何帮助,因为处理器的数量是无数的。

8086 有 8 个(或多或少通用的)16 位寄存器,包括
堆栈指针,但不包括指令指针、标志
寄存器和段寄存器。其中四个,AX,BX,CX,DX,可以
还可以访问两倍数量的 8 位寄存器(见图)
其他四个,BP、SI、DI、SP 仅是 16 位。

我假设混乱来自维基百科上的这句话。您阅读的两个来源都是正确的。有8个通用寄存器(在文章中它被标记为“或多或少通用”,我不知道谁可以写这个),它们是:AX BX CX DX和SI DI BP SP。还有段寄存器、特殊用途寄存器和标志寄存器(在“排除”一词后面注明,我猜,应该读作“有寄存器,如果排除这些寄存器,则有 8 个”) 3组”,含糊不清)。

问题出在措辞上。引用的句子令人困惑,我可以看出你的问题来自哪里。问问总没有坏处,但你应该明白维基百科不是可靠的知识来源,如果你感到困惑,就拿起一本书吧。

I took Computer Architecture course and I understood that processor
has 32 registers each of 32 bit.

This doesn't answer your question, but if you want to communicate with annother engineer, you have to use the proper language. Saying "a (some) processor has 32 registers that are 32 bits in size" won't get you anywhere, there are countless numbers of processors.

The 8086 had eight (more or less general) 16-bit registers including
the stack pointer, but excluding the instruction pointer, flag
register and segment registers. Four of them, AX, BX, CX, DX, could
also be accessed as twice as many 8-bit registers (see figure) while
the other four, BP, SI, DI, SP, were 16-bit only.

I'm assuming the confusion comes from this sentence on the Wikipedia. Both of the sources you read are right. There are 8 general purpouse registers (in the article it's noted as "more or less general", i've no idea who could write that), they are: AX BX CX DX and SI DI BP SP. There are also segment registers, special purpouse registers and a flag register (which are noted after the "excluding" word, which, i'm guessing, is suppoused to be read as "there are registers, there's 8 of them if you exclude these 3 groups", it's vague).

The issue is in the wording. The quoted sentence is confusing and i can see where your question is comming from. It never hurts to ask, but you should understand that Wikipedia is not a reliable source of knowledge, if you're ever confused, just pick up a book.

爺獨霸怡葒院 2025-01-09 04:25:32

计算机体系结构书籍经常使用 MIPS 作为示例,因为它相当简单且具有教育意义。 MIPS 有 32 个寄存器,但这并不意味着其他 32 位架构也有 32 个寄存器。 32位在这里仅意味着计算机具有32位位地址/32 位整数寄存器。它与寄存器的数量没有任何关系。

ARM 是最流行的 32 位架构,有 16 个寄存器(尽管 ARMv8 64 位将这个数字增加了一倍,达到 32 个)。许多其他 32 位架构也有 32 个以外的寄存器数量,例如 Motoroka 68k 和 SuperH v2/3/4,都有 16 个寄存器。有关架构列表,请参阅此处。您会看到,64 位架构很少有 64 个寄存器,因为这会大大增加寄存器文件的大小,并使上下文切换变得更糟。其中大多数有 32 个寄存器。

x86 在几十年前就向后兼容 8086,只有 8 个可见的整数寄存器。但实际上现在的 x86 CPU 内部有数百个寄存器,并使用寄存器重命名来克服寄存器的限制寄存器的数量。

Computer architecture books often use MIPS as example because it's rather simple and educational. MIPS has 32 registers but this does not mean that other 32-bit architectures also have 32 registers. 32-bit here only means that the computer has 32-bit address/32-bit integer registers. It's not related to the number of registers in any way.

ARM, the most popular 32-bit architecture, has 16 registers (although ARMv8 64-bit doubled this number to 32). Many other 32-bit architectures also have register number other than 32 such as Motoroka 68k and SuperH v2/3/4, all have 16 registers. For the list of architectures look at here. You see, 64-bit architectures rarely have 64 registers, as that'll increase the register file size a lot, and makes context switch worse. Most of them have 32 registers.

x86, being backward compatible with 8086 many decades ago, has only 8 visible integer registers. But in fact x86 CPUs nowadays have hundreds of registers inside and use register renaming to overcome the limit in number of registers.

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