FPGA's are not processors. C is a language designed for processors.
Yes, there are C to FPGA compilers.
Are they a good idea? I'd say No. The design you're going to end up with is (from what I've seen) normally a state machine that has one state per line of code in the C. The state machine then moves through the states performing the algorithm. Either that or some other kind of Turing machine is put in place to execute the code.
This is not how somebody skilled in FPGA design would generally approach a problem. It's a slow, and potentially gate hungry way doing things.
In the same way that English is a better language to write a novel than Fortran, VHDL and Verilog are better languages to describe logic circuits than C.
If you're serious about using FPGAs, use a language that is designed to describe logic circuits. It might be a steep learning curve, but the results will be much better IMHO.
Performance drawbacks and considerations are found in the system architecture and communication bandwidths rather than in using C vs. a hardware design language (HDL). The considerations in using C vs. an HDL lies in programming time and software maintenance issues, not so much in performance.
You can install a soft processor core inside the FPGA logic, and run your C code inside the virtual processor. Xilinx has Microblaze (licensed) and Picoblaze (free) cores. There are other soft cores you can implement as well (MIPS, x86, 8051, etc).
However, this is largely considered a "hack", as the cores are very slow compared to real cores. And I think that any C-to-FPGA conversion is ultimately going to start smelling like running a soft core, and not give you the efficiency you deserve for running on a FPGA. FPGAs are not Turing machines, they are a sack of logic gates. You can build a Turing machine out of the gates, but that is not why you bought the sack of gates.
Its sort of like buying a bag of Legos, and building a hammer and set of nails out of the bricks. It might work, but you are better off buying a hammer to pound nails, and better off building Castles, Space Ships and Fire Stations with the Legos.
I'd like to add something that I believe is the closest answer to the OP's question. If you're looking for a C-like language (which is not the same as C), you should definitely check out Synflow. The idea is to have a modern language that allows you to design faster without the learning curve of VHDL/Verilog and with no overhead. Also it's free and open source!
You should have a look at SystemC. The advantages of using a C based language is plentiful. Especially, on a system design perspective you can utilize that your other software (firmware and other low level stuff) is written in C. Hence, your software team can on a really early stage test against the rtl code.
In 2011, Xilinx bought the company AutoESL that had developed high level synthesis with SystemC. Xilinx has reused the name when the released its product "AutoESL". Especially with their new circuit Zynq, there a dual core ARM Cortex A9 embedded together with the FPGA logic, this will probably become a powerful tool for system development.
确实有一些编译器允许您使用 C 等高级语言来推断（使用不完整的描述来求解）硬件电路。“C 到门”实际上是一个流行的流行语。公司宣传的形象是，如果程序员使用的语言是用来描述软件的语言，那么他们就能够编写硬件。由于多种原因，这是极其错误的，其中最主要的是 C 语言和硬件描述语言所采用的执行模型之间的根本差异。
一个说明性的例子：C 假设其核心是一个大型可随机访问的线性寻址存储器 - 这种假设很少适用于硬件。 C 到门编译器面临着一项具有挑战性的任务，即解释所描述的程序的行为，并设计具有相同行为的硬件电路。
虽然类 C 语言在有限的用例中是一种很好的生产力工具，但如果您熟悉 C，这些编译器肯定不会让您突然知道如何设计硬件。
希望这会有所帮助，
There are indeed some compilers that allow you to infer (solve using an incomplete description) hardware circuits using a high-level language like C. "C-to-gates" is in fact a popular buzzword. The image companies advertise is that programmers are able to write hardware if the language they use is one they have used to describe software. This is incredibly wrong for a number of reasons, chief among them being the fundamental differences between the execution model assumed by languages like C and hardware description languages.
An illustrative example: C assumes at its heart a large randomly accessible linear-addressed memory - an assumption that rarely holds for hardware. A C-to-gates compiler faces a challenging task of interperting the behavior of the program described, and designing a hardware circuit with the same behavior.
While C-like languages are a great productivity tool in limited use cases, these compilers certainly don't allow you to suddenly know how to design hardware if you are familiar with C.
我猜你使用了 Handel C。它是 C 的子集。据我所知，结果不是很优化。 Verilog 和 VHDL 允许更多优化。我这样说是基于几年前我对 Handel C 的体验
I guess you used Handel C. Its a subset of C. From what I know the result is not very optimized. Verilog and VHDL allows for more optimization. I am saying this based on the my experience with Handel C a few years back
您可能想了解一下 C 语言到硬件技术，您可以在其中编写 C 代码，并将其编译/转换为 VHDL 或 Verilog。 这篇文章列出了一些编译器。我自己没有使用过，所以没有任何经验。希望这有帮助！
You might want to take a look at C-to-hardware technology, where you can write C code and it will get compiled/translated to VHDL or Verilog. This post lists a few compilers. Haven't used it myself so I don't have any experience with it. Hope this helps!
为了将现有的高级编程语言（C 是其中之一）编译为 FPGA 目标，人们付出了很多努力。事实上，它们中的大多数确实生成了优化的代码。例如，Impulse C 是 C 的一个子集，带有一些支持进程级并行性的附加库，以及一个针对指令级并行性优化 C 输入的编译器。它对循环进行管道处理，将某些操作映射到它知道底层 FPGA 系列提供的高性能硬件原语等。（全面披露：我帮助构建了 Impulse C 工具链。）
C 到硬件环境 列出 Carlito 和 David Pointer 的链接非常详尽。其中许多公司都支持 Xilinx Virtex-5，如果您使用主要供应商的任何最新 FPGA 系列，那么硬件选择应该不成问题。某些 HLL 环境比其他环境更好地支持内置（或软核）嵌入式 CPU。
Many designers write VHDL/Verilog instead of a high-level language, for the same reasons that many programmers used to (and still do in some cases) write assembly instead of Java: you can tune resource usage and performance at a low level. Both VHDL and Verilog are languages designed for designing hardware. C is not. Given enough time, you could always write a program in VHDL/Verilog that will outperform a high-level language program. What an HLL gives you is 1) faster development, 2) ease of maintenance, and 3) possibly greater portability.
There have been many efforts to compile existing high-level programming languages (C is one) to FPGA targets. Most of them do, in fact, generate optimized code. Impulse C, for example, is a subset of C with some add-on libraries that support process-level parallelism, plus a compiler that optimizes the C input for instruction-level parallelism, too. It pipelines loops, maps certain operations to high-performance hardware primitives it knows the underlying FPGA family provides, etc. (Full disclosure: I helped build the Impulse C toolchain.)
The C-to-hardware environments list Carlito and David Pointer link to is pretty exhaustive. Xilinx Virtex-5 is supported by many of them, and if you're using any recent FPGA family from a major vendor, choice of hardware shouldn't be a problem. Some of the HLL environments support built-in (or softcore) embedded CPUs better than others.
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FPGA 不是处理器。 C 是一种为处理器设计的语言。
是的，有 C 到 FPGA 编译器。
这是个好主意吗？我会说不。你最终得到的设计（从我所看到的来看）通常是一个状态机，在 C 语言中每行代码都有一个状态。然后状态机在执行的状态之间移动算法。要么使用该图灵机，要么使用某种其他类型的图灵机来执行代码。
这不是 FPGA 设计技术人员通常处理问题的方式。这是一种缓慢且可能需要大量门的做事方式。
就像英语比 Fortran 更适合写小说一样，VHDL 和 Verilog 比 C 更适合描述逻辑电路
。如果您认真考虑使用 FPGA，请使用专为描述逻辑电路而设计的语言。这可能是一个陡峭的学习曲线，但恕我直言，结果会好得多。
FPGA's are not processors. C is a language designed for processors.
Yes, there are C to FPGA compilers.
Are they a good idea? I'd say No. The design you're going to end up with is (from what I've seen) normally a state machine that has one state per line of code in the C. The state machine then moves through the states performing the algorithm. Either that or some other kind of Turing machine is put in place to execute the code.
This is not how somebody skilled in FPGA design would generally approach a problem. It's a slow, and potentially gate hungry way doing things.
In the same way that English is a better language to write a novel than Fortran, VHDL and Verilog are better languages to describe logic circuits than C.
If you're serious about using FPGAs, use a language that is designed to describe logic circuits. It might be a steep learning curve, but the results will be much better IMHO.
简短的回答是“是的，当然”。
这是针对 FPGA 和基于 FPGA 的系统的 C 编译器的精彩调查。
C 到硬件编译器（HLL 综合）
性能缺陷和注意事项存在于系统架构和通信带宽中，而不是存在于系统架构和通信带宽中。使用 C 与硬件设计语言 (HDL)。使用 C 与 HDL 的考虑因素在于编程时间和软件维护问题，而不是性能。
The short answer is "yes, certainly".
Here's an excellent survey of C compilers for FPGAs and FPGA-based systems.
C-to-hardware compiler (HLL synthesis)
Performance drawbacks and considerations are found in the system architecture and communication bandwidths rather than in using C vs. a hardware design language (HDL). The considerations in using C vs. an HDL lies in programming time and software maintenance issues, not so much in performance.
您可以在 FPGA 逻辑内部安装软处理器内核，并在虚拟处理器内部运行 C 代码。 Xilinx 拥有 Microblaze（许可）和 Picoblaze（免费）内核。您还可以实现其他软核（MIPS、x86、8051 等）。
然而，这在很大程度上被认为是“黑客”，因为与真正的核心相比，核心速度非常慢。我认为任何 C 到 FPGA 的转换最终都会开始像运行软核，并且不会给您带来在 FPGA 上运行应有的效率。 FPGA 不是图灵机，它们是一袋逻辑门。你可以用门建造一台图灵机，但这不是你购买一袋门的原因。
这有点像买一袋乐高积木，然后用积木搭建一把锤子和一套钉子。它可能有用，但你最好买一把锤子来敲钉子，最好用乐高积木建造城堡、太空飞船和消防站。
You can install a soft processor core inside the FPGA logic, and run your C code inside the virtual processor. Xilinx has Microblaze (licensed) and Picoblaze (free) cores. There are other soft cores you can implement as well (MIPS, x86, 8051, etc).
However, this is largely considered a "hack", as the cores are very slow compared to real cores. And I think that any C-to-FPGA conversion is ultimately going to start smelling like running a soft core, and not give you the efficiency you deserve for running on a FPGA. FPGAs are not Turing machines, they are a sack of logic gates. You can build a Turing machine out of the gates, but that is not why you bought the sack of gates.
Its sort of like buying a bag of Legos, and building a hammer and set of nails out of the bricks. It might work, but you are better off buying a hammer to pound nails, and better off building Castles, Space Ships and Fire Stations with the Legos.
我想添加一些我认为最接近OP问题的答案。如果您正在寻找类似 C 的语言（与 C 不同），您绝对应该查看 Synflow。我们的想法是拥有一种现代语言，让您能够更快地进行设计，而无需 VHDL/Verilog 的学习曲线，并且没有任何开销。而且它是免费且开源的！
披露：我是 Synflow 的联合创始人:-)
I'd like to add something that I believe is the closest answer to the OP's question. If you're looking for a C-like language (which is not the same as C), you should definitely check out Synflow. The idea is to have a modern language that allows you to design faster without the learning curve of VHDL/Verilog and with no overhead. Also it's free and open source!
Disclosure: I'm co-founder of Synflow :-)
你应该看看SystemC。使用基于 C 的语言的优点很多。特别是，从系统设计的角度来看，您可以利用其他软件（固件和其他低级内容）是用 C 编写的。因此，您的软件团队可以针对 RTL 代码进行真正的早期测试。
2011年，Xilinx收购了AutoESL公司，该公司利用SystemC开发了高级综合。 Xilinx 在发布其产品“AutoESL”时重复使用了该名称。特别是他们的新电路Zynq，有一个双核ARM Cortex A9与FPGA逻辑一起嵌入，这可能会成为系统开发的强大工具。
You should have a look at SystemC. The advantages of using a C based language is plentiful. Especially, on a system design perspective you can utilize that your other software (firmware and other low level stuff) is written in C. Hence, your software team can on a really early stage test against the rtl code.
In 2011, Xilinx bought the company AutoESL that had developed high level synthesis with SystemC. Xilinx has reused the name when the released its product "AutoESL". Especially with their new circuit Zynq, there a dual core ARM Cortex A9 embedded together with the FPGA logic, this will probably become a powerful tool for system development.
确实有一些编译器允许您使用 C 等高级语言来推断（使用不完整的描述来求解）硬件电路。“C 到门”实际上是一个流行的流行语。公司宣传的形象是，如果程序员使用的语言是用来描述软件的语言，那么他们就能够编写硬件。由于多种原因，这是极其错误的，其中最主要的是 C 语言和硬件描述语言所采用的执行模型之间的根本差异。
一个说明性的例子：C 假设其核心是一个大型可随机访问的线性寻址存储器 - 这种假设很少适用于硬件。 C 到门编译器面临着一项具有挑战性的任务，即解释所描述的程序的行为，并设计具有相同行为的硬件电路。
虽然类 C 语言在有限的用例中是一种很好的生产力工具，但如果您熟悉 C，这些编译器肯定不会让您突然知道如何设计硬件。
希望这会有所帮助，
There are indeed some compilers that allow you to infer (solve using an incomplete description) hardware circuits using a high-level language like C. "C-to-gates" is in fact a popular buzzword. The image companies advertise is that programmers are able to write hardware if the language they use is one they have used to describe software. This is incredibly wrong for a number of reasons, chief among them being the fundamental differences between the execution model assumed by languages like C and hardware description languages.
An illustrative example: C assumes at its heart a large randomly accessible linear-addressed memory - an assumption that rarely holds for hardware. A C-to-gates compiler faces a challenging task of interperting the behavior of the program described, and designing a hardware circuit with the same behavior.
While C-like languages are a great productivity tool in limited use cases, these compilers certainly don't allow you to suddenly know how to design hardware if you are familiar with C.
Hope this helps,
我猜你使用了 Handel C。它是 C 的子集。据我所知，结果不是很优化。 Verilog 和 VHDL 允许更多优化。我这样说是基于几年前我对 Handel C 的体验
I guess you used Handel C. Its a subset of C. From what I know the result is not very optimized. Verilog and VHDL allows for more optimization. I am saying this based on the my experience with Handel C a few years back
您可能想了解一下 C 语言到硬件技术，您可以在其中编写 C 代码，并将其编译/转换为 VHDL 或 Verilog。 这篇文章列出了一些编译器。我自己没有使用过，所以没有任何经验。希望这有帮助！
You might want to take a look at C-to-hardware technology, where you can write C code and it will get compiled/translated to VHDL or Verilog. This post lists a few compilers. Haven't used it myself so I don't have any experience with it. Hope this helps!
许多设计人员编写 VHDL/Verilog 而不是高级语言，其原因与许多程序员过去（并且在某些情况下仍然这样做）编写汇编而不是 Java 的原因相同：您可以在较低级别上调整资源使用和性能。 VHDL 和 Verilog 都是为设计硬件而设计的语言。 C 不是。如果有足够的时间，您总是可以用 VHDL/Verilog 编写一个优于高级语言程序的程序。 HLL 为您提供的是 1) 更快的开发速度，2) 易于维护，以及 3) 可能更高的可移植性。
为了将现有的高级编程语言（C 是其中之一）编译为 FPGA 目标，人们付出了很多努力。事实上，它们中的大多数确实生成了优化的代码。例如，Impulse C 是 C 的一个子集，带有一些支持进程级并行性的附加库，以及一个针对指令级并行性优化 C 输入的编译器。它对循环进行管道处理，将某些操作映射到它知道底层 FPGA 系列提供的高性能硬件原语等。（全面披露：我帮助构建了 Impulse C 工具链。）
C 到硬件环境 列出 Carlito 和 David Pointer 的链接非常详尽。其中许多公司都支持 Xilinx Virtex-5，如果您使用主要供应商的任何最新 FPGA 系列，那么硬件选择应该不成问题。某些 HLL 环境比其他环境更好地支持内置（或软核）嵌入式 CPU。
Many designers write VHDL/Verilog instead of a high-level language, for the same reasons that many programmers used to (and still do in some cases) write assembly instead of Java: you can tune resource usage and performance at a low level. Both VHDL and Verilog are languages designed for designing hardware. C is not. Given enough time, you could always write a program in VHDL/Verilog that will outperform a high-level language program. What an HLL gives you is 1) faster development, 2) ease of maintenance, and 3) possibly greater portability.
There have been many efforts to compile existing high-level programming languages (C is one) to FPGA targets. Most of them do, in fact, generate optimized code. Impulse C, for example, is a subset of C with some add-on libraries that support process-level parallelism, plus a compiler that optimizes the C input for instruction-level parallelism, too. It pipelines loops, maps certain operations to high-performance hardware primitives it knows the underlying FPGA family provides, etc. (Full disclosure: I helped build the Impulse C toolchain.)
The C-to-hardware environments list Carlito and David Pointer link to is pretty exhaustive. Xilinx Virtex-5 is supported by many of them, and if you're using any recent FPGA family from a major vendor, choice of hardware shouldn't be a problem. Some of the HLL environments support built-in (or softcore) embedded CPUs better than others.