重新定位 ARM 异常向量？
如何重新定位 ARM 异常向量？
基本上，我需要能够以某种方式重新映射它们，因此当 ARM 内核尝试执行向量时，它应该执行存储在内核 RAM 位而不是 ROM 位于0x0。这可能吗？或者我打算将中断从ROM路由到内核？
所以本质上，有没有一种方法可以告诉 ARM 内核，“这是向量表的新地址”？我知道你可以在高端启动 CPU矢量模式，但这不是我想要的。我需要能够动态地将向量基设置为自定义地址。
How would I relocate the ARM exception vectors?
Basically, I need to be able to remap them in a way, so when the ARM core tries to execute the vector, it should execute the custom exception vector that is stored in kernel's RAM bit and not in the ROM that is at 0x0. Is that possible? Or am I meant to route the interrupts to the kernel from the ROM?
So essentially, is there a way of telling the ARM core, "here is the new address for your vector table"? I know that you can start the CPU in the high vector mode, but that's not what I'm looking for. I need to be able to set the vector base to a custom address dynamically.
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这在很大程度上取决于您正在使用的核心。
Cortex-M3 芯片可以使用系统控制块中的向量表偏移寄存器 (VTOR) 更改基址。某些实现可能会限制可能的地址。
在“传统”芯片（ARM7/9、Cortex-A/R）中，我认为没有一个允许您指定任意基数，尽管它们中的大多数可以在 00000000 和 FFFF0000 之间切换，并且少数允许使用“开始” RAM”地址。
但是，如果芯片具有 MMU，您通常可以将 RAM 页映射到 FFFF0000 并将处理程序复制到那里。我相信 Linux 就是这么做的。
This is highly dependent on the core you're working with.
Cortex-M3 chips can change the base address using the Vector Table Offset Register (VTOR) in the System Control Block. Some implementations might restrict possible addresses.
Of the "traditional" chips (ARM7/9, Cortex-A/R), I think none allow you to specify an arbitrary base, although most of them can switch between 00000000 and FFFF0000, and a few allow to use the "start of RAM" address.
However, if the chip has MMU, you can usually map a RAM page at FFFF0000 and copy your handlers there. I believe that's what Linux does.
此外，如果您的处理器有安全扩展，您可以使用 VBAR(Vector Base Address Register)
MCR p15, 0,请参阅中的 B4.1.156 ARM 架构参考手册。
More over, if your processor have security extension, you can take use of VBAR(Vector Base Address Register)
MCR p15, 0, <Rt>, c12, c0, 0See the B4.1.156 in ARM Architecture Reference Manual.
对于 Cortex-A9 处理器，这可以通过使用 Cp15 协处理器寄存器中的 VBAR 寄存器来完成。向量基地址寄存器的目的是保存监视器异常向量的基地址。
For a cortex-A9 processor this can be done by making use of the VBAR register in the Cp15 co-processor register. The purpose of the Vector Base Address Register is to hold the base address for the Monitor exception vector.
系统寄存器VBAR指定向量表的基地址。 VBAR 可以从 PL1 或更高版本更改。与大多数系统寄存器一样，当实现安全扩展 (TrustZone) 时，VBAR 也会被存储。
A system register VBAR specifies the base address of the vector table. VBAR can be changed from PL1 or higher. Like most system registers, VBAR is also banked when Security Extension (TrustZone) is implemented.