Verilog 编译错误:意外的“[”,期望“IDENTIFIER”或“TYPE_IDENTIFIER”或'#'或'('

发布于 2024-12-28 12:05:26 字数 440 浏览 2 评论 0原文

我想设计一个带有生成结构和二维内存的简单乘法器。但我无法编译以下 verilog 代码。有人可以给一些提示吗?

module classic_multiplier(
    a, b,
    a_by_b);
parameter M = 2;

input [M-1:0] a, b;
output reg [M-1:0] a_by_b [0:2*M-2];

//the first and
genvar i, k;
generate begin
    for(k = 0; k <= M-1; k=k+1) begin
        for(i = 0; i <= k; i=i+1) begin
            a_by_b[k][i] = a[i] & b[k-i];
        end
    end
end
endgenerate
endmodule      

I want to design a simple multiplier with the generate construct and two dimensional memory. But I can not compile the following verilog code. Could anyone give some hint please?

module classic_multiplier(
    a, b,
    a_by_b);
parameter M = 2;

input [M-1:0] a, b;
output reg [M-1:0] a_by_b [0:2*M-2];

//the first and
genvar i, k;
generate begin
    for(k = 0; k <= M-1; k=k+1) begin
        for(i = 0; i <= k; i=i+1) begin
            a_by_b[k][i] = a[i] & b[k-i];
        end
    end
end
endgenerate
endmodule      

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慕烟庭风 2025-01-04 12:05:26

这里的问题似乎是您有一个 2D 输出端口 (a_by_b)。我不太确定为什么你需要它作为乘法器,输出端口大小应该是 2*M,所以:

output reg [(2*M-1):0] a_by_b;

另外,不需要 begin > 在 generate 之后(因此不需要匹配 end),但是好吧,这不是真正的问题,如果您愿意,您可以添加它们。

接下来,需要为generate块内的for循环命名,例如:

generate
  for(k = 0; k <= M-1; k=k+1) begin : for_outer
    for(i = 0; i <= k; i=i+1) begin : for_inner
      a_by_b[k][i] = a[i] & b[k-i];
    end
  end
endgenerate

当然,如果更改a_by_b。

It seems the problem here is that you have a 2D output port (a_by_b). I'm not quite sure why you would need it for a multiplier anyway, the output port size should be 2*M, so:

output reg [(2*M-1):0] a_by_b;

Also, there is no need for the begin after generate (and thus no need either for the matching end), but ok, that's not really the problem here, you can add them if you want.

Next, for loops inside a generate block need to be named, for example:

generate
  for(k = 0; k <= M-1; k=k+1) begin : for_outer
    for(i = 0; i <= k; i=i+1) begin : for_inner
      a_by_b[k][i] = a[i] & b[k-i];
    end
  end
endgenerate

Of course, you will need to change the code inside the for loops if you change the definition of a_by_b.

⊕婉儿 2025-01-04 12:05:26

当工具看到a_by_b[k][i] = a[i] & b[ki]; 它确保 a_bay_b 是一个模块。在该行中添加 assignalways @* 前缀,该工具将接受该代码。

生成块在编译细化期间扩展代码。使用给定的代码:

genvar i, k;
generate
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      a_by_b[k][i] = a[i] & b[k-i]; // Error will happen here
    end
  end
endgenerate

将扩展为:

a_by_b[0][0] = a[0] & b[0-0]; // * Compile Error *
a_by_b[1][0] = a[0] & b[1-0]; // **  Assignment without assign, always @*
a_by_b[1][1] = a[1] & b[1-1]; // ** block statement (e.g. always,initial)

使用 assign 的正确代码:

genvar i, k;
generate
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      assign a_by_b[k][i] = a[i] & b[k-i];
    end
  end
endgenerate 

将计算为:

assign a_by_b[0][0] = a[0] & b[0-0];
assign a_by_b[1][0] = a[0] & b[1-0];
assign a_by_b[1][1] = a[1] & b[1-1];

或使用 always @*

genvar i, k;
generate
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      always @*  a_by_b[k][i] = a[i] & b[k-i];
    end
  end
endgenerate 

将计算为:

always @*  a_by_b[0][0] = a[0] & b[0-0];
always @*  a_by_b[1][0] = a[0] & b[1-0];
always @*  a_by_b[1][1] = a[1] & b[1-1];

或者,可以使用单个always块在没有生成块的情况下使用:

integer i,k;
always @* begin
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      a_by_b[k][i] = a[i] & b[k-i];
    end
end

When the tool sees a_by_b[k][i] = a[i] & b[k-i]; it assures that a_bay_b is a module. Prefix an assign or always @* to the line and the tool will accept accept the code.

A generate blocks expands the code during the compile elaboration time. With the given code:

genvar i, k;
generate
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      a_by_b[k][i] = a[i] & b[k-i]; // Error will happen here
    end
  end
endgenerate

Will expand to:

a_by_b[0][0] = a[0] & b[0-0]; // * Compile Error *
a_by_b[1][0] = a[0] & b[1-0]; // **  Assignment without assign, always @*
a_by_b[1][1] = a[1] & b[1-1]; // ** block statement (e.g. always,initial)

The correct code with assign:

genvar i, k;
generate
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      assign a_by_b[k][i] = a[i] & b[k-i];
    end
  end
endgenerate 

Will evaluate to:

assign a_by_b[0][0] = a[0] & b[0-0];
assign a_by_b[1][0] = a[0] & b[1-0];
assign a_by_b[1][1] = a[1] & b[1-1];

Or with always @*:

genvar i, k;
generate
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      always @*  a_by_b[k][i] = a[i] & b[k-i];
    end
  end
endgenerate 

Will evaluate to:

always @*  a_by_b[0][0] = a[0] & b[0-0];
always @*  a_by_b[1][0] = a[0] & b[1-0];
always @*  a_by_b[1][1] = a[1] & b[1-1];

Alternatively an single always block can be used without a generate block:

integer i,k;
always @* begin
  for(k = 0; k <= M-1; k=k+1) begin
    for(i = 0; i <= k; i=i+1) begin
      a_by_b[k][i] = a[i] & b[k-i];
    end
end
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