不同的ARM厂商提供的指令集是否不同？
我第一次接触 ARM 指令集是在 80 年代，从那以后就没有使用过。出于好奇，我查看了平板电脑和其他 ARM 设备，并注意到 CPU 是由不同制造商生产的。
我进行了快速搜索，但找不到关于不同 ARM 芯片是否具有不同指令集的明确说法。
我认为它们基本上是相同的。
I first came across the ARM instruction set in the 80's, and have not used it since. Out of curiosity I was looking at the the tablets and other ARM devices and note that the CPU's are produced by different manufacturers.
I did a quick search but I couldn't find a definitive statement as whether the different ARM chips have differing instruction sets.
I would assume that in the main they are the same.
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（4）
转到 http://infocenter.arm.com 沿着内容左侧查找 ARM 架构。并根据该参考手册。过去只有一个 ARM ARM（ARM 架构参考手册），但该系列已经发展到必须将其分成多个系列的程度。
ARM ARM 将向您展示指令集。我认为他们所说的ARMv5手册是旧的ARM ARM。您将找到 ARM 指令（32 位）和拇指指令（16 位）。对于每条指令，他们都会列出支持它的体系结构，因此您可能会看到 ARMv4（ARMv4 又名 ARM7，如流行的 ARM7TDMI 内核）不支持的 ARMv5 指令。 Thumb 指令受 ARMv4T 和更新版本等支持。
因此，您可能已经习惯了核心 32 位 Arm 指令集，其中不时添加新指令并修复错误/限制（例如 ldr r0,[r0] ）等。
浮点单元已经有一两次大修，大多数核心没有fpu，而有fpu的核心并不意味着芯片供应商将其包含在芯片中。 fpa 较旧，vfp 较新，现在还有霓虹灯。如果您注意的话，这些都属于通用协处理器指令类别。但您不必知道/使用协处理器版本，它们对所有内容都有别名。
有/曾经有这个 java/jazelle 的东西，同样的故事，一些核心可能将它作为一个选项，但这并不意味着供应商包含它。
至少有两组对thumb指令集的thumb2扩展。在thumb2扩展之前，thumb指令都是16位的，并且与ARM指令有一对一的映射，因此您只需要一个ARM内核，解码器从较小的指令转换为ARM指令并将其提供给内核。除分支外，所有指令都是 16 位，如果您查看该模式，您可以很容易地将其解码为两个单独的 16 位指令。因此，他们决定让他们的微控制器产品更小，而不是每个人都只使用 ARM7TDMI 并消耗芯片尺寸和功耗，支持拇指2的处理器只是拇指，他们不支持32位ARM指令，没有拇指指令的ARM内核被翻译成等等新的核心。 ARMv6-M 又名 Cortex-m0 和 Cortex-m1 采用拇指指令集并添加一些 32 位指令来缩小与 ARM 的性能差距（拇指更小，是的，但如果您将相同的代码编译为两者都是，从我的实验中使用拇指需要多花 10-20% 的指令）。理论上，在可以比较的时间和地点，thumb-2 (ARMv7-M) 优于 ARM。不管出于什么原因，Cortex-m3 首先出现，它是 ARMv7-M，并且在拇指指令集中添加了一堆 32 位拇指 2 指令。我最近统计了一下，ARMv6-M 添加了大约 20 条指令，ARMv7-M 在基本拇指指令集中添加了大约 140-150 条指令。拇指2基本上是可变字长的。同样仅在 cortex-m 系列上运行。看起来就像他们以拇指的名义再次重建了 ARM 指令集。不完全，但你会得到很多像 ARM 一样的指令，三个寄存器而不是两个，能够访问更高的寄存器并使用立即数等等。这导致了编写为 ARM 和拇指/拇指2 编译的 asm 的愿望。所以他们想出了一个统一的语法。你可以写一条指令，比如
如果为拇指组装，那就是指令，如果为手臂组装，他们会将其转换为
你，而不是任何语法错误。您必须指定您正在使用统一语法，至少使用 gnu binutils 汇编器 (gas)。
一组同样重要的文档是技术参考手册，也位于 infocenter.arm.com。每个核心都有一个trm，实际上每个核心的每个rev都有一个TRM。此外，L2 缓存等额外成本项目对于每个版本都有自己的 TRM。找出芯片供应商购买/使用的核心以及可能的修订版（修订版 2.0 r2p0、修订版 1.0 r1p0 等）非常重要，因为它们之间存在编程差异以及勘误表差异（不要相信 Linux 作为参考！ ，这是一个巨大的混乱，每次我看到另一家公司完全误解并误用了核心/勘误表差异时，目前这有点灾难）。有时，TRM 包含指令信息，或者更清晰地描述该核心支持和不支持的内容。 ARM ARM 是通用的，它们涵盖整个系列或多个系列的内核，其中 TRM 非常特定于一个内核。 ARM ARM 和 TRM 之间令人困惑的一个例子是，查看 ARM ARM，您可能会觉得您可以使用 BE-32 或 BE-8 大端模式，但实际情况是您有一个或另一个 ARMv6，并且较新的是BE-8，就这样，习惯它吧。 ARMv5 和 ARMv4 是 BE-32 或在 ARMv6 之前称为大端。我强烈建议不要在手臂上使用大端，尽管您认为您可能会从中受益。使用本机模式，您将节省大量的工作和失败。我从个人经验中提到这一点，试图找出为什么 ARM 中描述的位在我使用的核心中不起作用。
64 位核心正处于开发阶段，如果它已经完成并且只是寻找有人扣动扳机并使用它，我不会感到惊讶。实际上 ARMv8 文档已经可用，现在就下载。
简短回答 infocenter.arm.com 在 ARM 架构下，您可以找到描述不同指令集的所有文档以及随着时间的推移对这些指令集的改进/添加。
goto http://infocenter.arm.com along the left under contents look for ARM architecture. And under that Reference Manuals. used to be there was a single ARM ARM (ARM Architecture Reference Manual) but the family has grown to the point they had to break it into, well, families.
The ARM ARM's are going to show you the instruction sets. What I think they call the ARMv5 manual is the old ARM ARM. You will find the ARM instructions (32bit) and thumb instructions (16 bit). For each instruction they list what architecture supports it, so you might see an ARMv5 instruction that is not supported by the ARMv4 (ARMv4 a.k.a ARM7, like the popular ARM7TDMI core). Thumb instructions are supported by ARMv4T and newer, etc.
So there is the core 32 bit arm instruction set which you may have been used to with new instructions added from time to time and bugs/restrictions fixed (ldr r0,[r0] for example), etc.
The floating point unit has had one or two overhauls, most cores do not have a fpu and the ones that have an fpu that doesnt mean the chip vendor included it in the chip. the fpa being the older, vfp being newer and now neon stuff. If you pay attention these all fall into the generic coprocessor instructions category. But you dont have to know/use the coprocessor version they have aliases for everything.
There is/was this java/jazelle thing, same story some cores might have it as an option doesnt mean the vendor included it.
At least two sets of thumb2 extensions to the thumb instruction set. Before thumb2 extensions the thumb instructions were all 16 bit and had a one to one mapping to an ARM instruction, makes sense you only need an ARM core, the decoder translates from the smaller instruction to ARM instruction and feeds that to the core. All instructions are 16 bit except the branch, and if you look at that pattern you can quite easily decode that as two separate 16 bit instructions. So then they decide to make their microcontroller offering smaller, instead of everyone just using the ARM7TDMI and consuming the chip size and power, thumb2 capable processors are thumb only, they do not support 32 bit ARM instructions, there is no ARM core that thumb instructions are translated to, etc. new core. The ARMv6-M a.k.a Cortex-m0 and Cortex-m1 take the thumb instruction set and add a few 32 bit instructions to close the performance gap to ARM (thumb was smaller yes, but a little slower than ARM if you compiled the same code to both, it took like 10-20% more instructions from my experiments to use thumb). In theory thumb-2 (ARMv7-M) outperforms ARM when and where you can compare them. For whatever reason the Cortex-m3 came out first which is ARMv7-M and has a bunch of 32 bit thumb2 instructions added to the thumb instruction set. I recently counted and ARMv6-M added like 20, ARMv7-M has like 140-150 instructions added to the base thumb instruction set. thumb2 is basically variable word length. And again only runs on the cortex-m series. Looking at it it is almost like they re-built the ARM instruction set again under the name thumb. not completely but you get back a lot of arm like instructions, three register instead of two, being able to reach higher registers and use immediates, etc. What this caused is a desire to write asm that compiled for both ARM and thumb/thumb2. So they came up with a unified syntax. you can write an instruction like
If assembling for thumb, that is the instruction, if assembling for arm they will convert it to
for you, instead of any syntax errors. You have to specify that you are using the unified syntax, at least with the gnu binutils assembler (gas).
An equally important set of documents is the Technical Reference Manuals, also at infocenter.arm.com. Each core has a trm, actually each rev of each core has a TRM. Also the extra cost items like L2 caches have their own TRM, for each rev. it is important to find out the core the chip vendor bought/used and if possible the revision (rev 2.0 r2p0, rev 1.0 r1p0, etc) as there are programming differences as well as errata differences between them (dont trust Linux as a reference!, it is a huge mess, every time I look yet another company has completely misunderstood and misapplied core/errata differences, it si a bit of a disaster at the moment). Sometimes the TRM includes instruction information, or paints a more clear picture on what that core supports and doesnt support. The ARM ARM's are generic they cover the whole family or a number of families of cores, where the TRM is very specific to one core. An example of confusing between the ARM ARM and the TRM is that looking at the ARM ARM you might get the impression that you can use BE-32 or BE-8 big endian modes, the reality is you have either one or the other ARMv6 and newer is BE-8, period, get used to it. ARMv5 and ARMv4 is BE-32 or before ARMv6 just called big endian. I highly recommend NOT using big endian on an arm despite what you think you might gain from it. go with the native mode and you will save yourself a ton of work and failure. I mention it from personal experience trying to figure out why the bits described in an ARM ARM just didnt work in the core I was using.
A 64 bit core is somewhere in the development phase, I wouldnt be surprised if it is done and just looking for someone to pull the trigger and use it. Actually the ARMv8 doc is available, downloading now.
Short answer infocenter.arm.com under ARM Architecture you find all the docs describing the different instruction sets as well as improvements/additions over time to those instruction sets.
制造商之间没有差异（就指令集而言）。
它们都尊重 ARM 规范。
有些扩展是可选的。 NEON 就是这种情况。
但据我所知，只有 Tegra 2 不包含此扩展。
这就是为什么 Tegra 2 对于视频解码来说是一个非常糟糕的处理器（例如）。
There is no difference (with respect to the instruction set) between manufacturers.
They all respect the ARM specification.
Some extensions are optional. This is the case with NEON.
But, as far as I know, only the Tegra 2 does not include this extension.
This is why the Tegra 2 is a very bad processor for video decoding (for example).
指令集有一些常见的变体，其中最常见的是 UAL、Thumb 和 Thumb2。一些包含专用硬件（例如 DSP）的 ARM 内核也扩展了该语言。
There are a few common variations of instructions sets, UAL, Thumb and Thumb2 being the most common. Some ARM cores that contain specialized hardware (such as DSPs) extend the language as well.
过去情况并非如此。 ARM 要求遵守他们的规范。 ARM 发布的 IP 当然遵守其规范，但他们也要求架构被许可人遵守它。然而，这种情况在 2019 年略有变化，当时 ARM 开始允许在其嵌入式 CPU 中使用自定义指令。
This used to not be the case. ARM required adherence to their spec. ARM ships IP which of course adheres to their spec but they also require the architecture licensees to adhere to it. However, that changed slightly in 2019 when ARM began to allow custom instructions with their embedded CPUs.