ESP寄存器和SS寄存器有什么区别?

发布于 2024-12-22 18:41:37 字数 53 浏览 2 评论 0原文

我只是汇编语言的初学者。 据我所知,ESP和SS都是指堆栈寄存器,但不太了解它们之间的区别。

I'm just a beginner in Assembly language.
As I know, ESP and SS both refer to stack registers but not quite understand the differences between them.

如果你对这篇内容有疑问,欢迎到本站社区发帖提问 参与讨论,获取更多帮助,或者扫码二维码加入 Web 技术交流群。

扫码二维码加入Web技术交流群

发布评论

需要 登录 才能够评论, 你可以免费 注册 一个本站的账号。

评论(1

自由如风 2024-12-29 18:41:37

ESP 寄存器是 16 位 SP 寄存器的 32 位版本,但在 32 位架构中,SS 无关紧要。那么,我们先来谈谈16位。关于 32 位的注释位于帖子末尾。

在 16 位 Intel x86 架构中:

  • SS 是堆栈段寄存器。它标识将用于堆栈的内存块。

  • SP 是堆栈指针寄存器。它指向堆栈段内的精确位置,该位置在任何给定时刻都是堆栈的“顶部”。


16 位 Intel 架构有一个笨重的机制,通过 16 位“段”加上 16 位“偏移量”来实现 20 位宽地址,因此 SS 寄存器将指向堆栈段,SP 寄存器将保存堆栈中的实际偏移量。我们会说当前堆栈位置位于SS:SP

当然,您可能想知道为什么它们只能拥有 20 位宽的地址而不是 32 位宽的地址,因为段寄存器是 16 位宽,而偏移寄存器又是 16 位宽。好吧,这就是该架构笨重的部分原因:SS:SP 对表示的实际地址不是计算为 (SS << 16) + SP,而是 (SS << 4) + SP。这意味着这些段具有非常高的重叠度:尽管每个段的长度为 65536 字节,但其开头与前一个段的开头仅相距 16 字节。因此,segment:offset 地址0:0 表示绝对地址0,而1:0 地址表示绝对地址16。 (显然他们不相信任何人都需要寻址超过 20 位的地址空间。)


32 位

在 32 位架构中,这些都不重要,因为 ESP 寄存器很大足以能够自行寻址整个 32 位内存地址空间,而不需要任何段寄存器。因此,如果您使用 ESP 寄存器,则根本不必担心 SS 寄存器。

The ESP register is the 32-bit version of the 16-bit SP register, but in the 32-bit architecture, SS is irrelevant. So, let's talk about 16-bit first. A note about 32-bit is at the end of the post.

In the 16-bit Intel x86 architecture:

  • SS is the stack-segment register. It identifies the block of memory that will be used for the stack.

  • SP is the stack pointer register. It points to the precise location within the stack segment which is at any given moment the 'top' of the stack.


The 16-bit Intel architecture had a clunky mechanism for implementing 20-bit wide addresses by means of 16-bit 'segments' plus 16-bit 'offsets', so the SS register would point to the stack segment, and the SP register would hold the actual offset into the stack. We would say that the current stack location was at SS:SP.

Naturally, you might wonder how come they were only able to have 20-bit wide addresses instead of 32-bit wide addresses, given that the segment register was 16-bit wide, and the offset register was another 16-bits wide. Well, this is part of why the architecture was clunky: the actual address represented by the SS:SP pair was not calculated as (SS << 16) + SP, instead it was (SS << 4) + SP. This means that the segments had a very high degree of overlap: even though each segment was 65536 bytes long, its start was only 16 bytes away from the start of the previous segment. So, the segment:offset address 0:0 represented absolute address 0, while the 1:0 address represented absolute address 16. (Apparently they did not believe that anyone would ever need to address more than 20 bits of address space.)


32-bit

In the 32-bit architecture, none of that matters, because the ESP register is large enough to be capable of addressing the entire 32-bit memory address space by itself, with no need for any segment register. So if you are using the ESP register you don't have to worry about the SS register at all.

~没有更多了~
我们使用 Cookies 和其他技术来定制您的体验包括您的登录状态等。通过阅读我们的 隐私政策 了解更多相关信息。 单击 接受 或继续使用网站,即表示您同意使用 Cookies 和您的相关数据。
原文