我们可以在一个always块中生成吗?

发布于 2024-12-21 14:10:46 字数 264 浏览 1 评论 0原文

我想要这样的东西:

generate  
   for( i=0 ; i<16 ; i=i+1 ) begin:  
      always @(posedge clk) begin  
         L[i+1] <= #1 R[i];  
         R[i+1] <= #1 L[i] ^ out[i];  
      end  
   end  
endgenerate 

如果有人能帮助我,我将不胜感激。

I want to have sth like this:

generate  
   for( i=0 ; i<16 ; i=i+1 ) begin:  
      always @(posedge clk) begin  
         L[i+1] <= #1 R[i];  
         R[i+1] <= #1 L[i] ^ out[i];  
      end  
   end  
endgenerate 

I would appreciate it if any one could possibly help me.

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暖心男生 2024-12-28 14:10:46

我认为你在这里不需要generate。只需在 always 块中使用 for 循环就可以了。

always @(posedge clk) begin    
   for( int i=0 ; i<16 ; i=i+1 ) begin  
         L[i+1] <= #1 R[i];  
         R[i+1] <= #1 L[i] ^ out[i];  
   end  
end

您可能需要考虑几个问题:

  • LR 总线的尺寸是多少? [15:0]
  • 您在哪里为 L[0]R[0] 赋值?
  • 您确定当 i 达到 15 时 i+1 仍在您的公交车范围内吗?

You don't need a generate here, I think. Just using a for loop within the always block will work.

always @(posedge clk) begin    
   for( int i=0 ; i<16 ; i=i+1 ) begin  
         L[i+1] <= #1 R[i];  
         R[i+1] <= #1 L[i] ^ out[i];  
   end  
end

A few questions you'd probably want to think about:

  • What size are the L and R buses? [15:0]?
  • Where are you assigning values to L[0] and R[0]?
  • Are you sure that i+1 when i hits 15 will be still within the bounds of your bus?
天赋异禀 2024-12-28 14:10:46

你可以做

always @(posedge clk)
  begin
  L[16:1] <= #1 R[15:0]
  R[16:1] <= #1 L[15:0] ^ out;
  end

You could do

always @(posedge clk)
  begin
  L[16:1] <= #1 R[15:0]
  R[16:1] <= #1 L[15:0] ^ out;
  end
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