Z80 上未记录的 16 位 I/O 寻址

发布于 2024-12-21 08:20:06 字数 292 浏览 4 评论 0原文

我从Z80上的Zilog数据表中注意到,对于I/O(IN和OUT)指令组,各种寄存器的内容通常放置在地址总线的高8位(取决于指令),其中低 8 位选择最多 256 个理论上连接的设备之一。

我的问题是使用这些高 8 位执行此操作有什么意义?我知道有些机器以某种方式使用它来降低解码复杂性,但是它们真的有什么用途吗?我想完全按照 Z80 的建议实现这些指令,但我不认为实现此行为有什么意义,因为它是非标准的。这种行为被描述为未记录的,因此,例如在“Sega Master System”上,我会逃脱这种惩罚吗?非常感谢。

问候, 菲尔·波特

I notice from the Zilog datasheet on the Z80 that with the I/O (IN and OUT) group of instructions, the contents of various registers are often placed in the top 8 bits of the address bus (depending on the instruction), with the lower 8 bits selecting one of up to 256 theoretically connected devices.

My question is what is the point of doing this with these upper 8 bits? I know some machines use this in someway related to decreasing decoding complexity, but are they seriously used for anything? I want to implement the instructions exactly as the Z80 suggests, but I don't see the point in implementing this behaviour as it is non-standard. This behaviour is described as undocumented, so on a 'Sega Master System' for example, will I get away with this? Many thanks.

Regards,
Phil Potter

如果你对这篇内容有疑问,欢迎到本站社区发帖提问 参与讨论,获取更多帮助,或者扫码二维码加入 Web 技术交流群。

扫码二维码加入Web技术交流群

发布评论

需要 登录 才能够评论, 你可以免费 注册 一个本站的账号。

评论(4

°如果伤别离去 2024-12-28 08:20:06

Zilog 记录了该行为(第 269-287 页)。

我猜想某些外设可能会使用地址总线的高位 A8..A15 作为一种 8 位参数。

The behavior is fully documented by Zilog (pages 269-287).

I guess that some peripherials may use the upper bits A8..A15 of the address bus as a sort of 8-bit parameter.

半窗疏影 2024-12-28 08:20:06

有些系统使用高8位作为地址,低8位作为参数。 Amstrad CPC 是主要的例子。这使得 OUT (C),r 几乎成为唯一可用的指令,当然它现在实际上充当 OUT (B),r;为了方便起见,经常使用C作为参数。推论是 OUT (n),A 几乎完全无用,除非您碰巧想将 0x34 发送到端口 0x34 等。

Some systems use the upper 8 bits as the address and the lower 8 bits as the parameter. The Amstrad CPC is the main example. This makes OUT (C),r almost the only usable instruction, although of course it now acts actually as OUT (B),r; C is often used as the parameter for convenience. The corollary is that OUT (n),A becomes almost completely useless, unless you happen to want to send 0x34 to port 0x34, etc.

朕就是辣么酷 2024-12-28 08:20:06

在 ZX Spectrum 上,键盘只能通过从端口 0xfe 读取来读取,而最高 8 个地址线正在选择 8 组 5 个按键之一。例如,如果您要扫描按键 QWER地址总线的高 8 位必须是 0xfb

    ld bc,#fbfe
    in a,(c)        ; reading from port 0xfe while upper 8 address lines are 0xfb

这与以下情况完全相同:

    ld a,#fb
    in a,(#fe)      ; reading from port 0xfe while upper 8 address lines are 0xfb

80 年代的一些街机通过在以下位置输出超过 8 位来与附加硬件进行通信 :一次使用一条 out 指令 -附加位是从高地址线读取的。

On ZX Spectrum the keyboard can be read only by reading from port 0xfe while the highest 8 address lines are selecting one of the 8 groups of 5 keys. For example, if you want to scan the keys Q, W, E, R, and T the upper 8 bits of the address bus have to be 0xfb:

    ld bc,#fbfe
    in a,(c)        ; reading from port 0xfe while upper 8 address lines are 0xfb

This is exactly the same as:

    ld a,#fb
    in a,(#fe)      ; reading from port 0xfe while upper 8 address lines are 0xfb

Some arcade machines from the 80s communicate with the additional hardware by outputting more than 8 bits at a time with one out instruction - the additional bits are read from the upper address lines.

深巷少女 2024-12-28 08:20:06

“对这些高 8 位执行此操作有何意义?”
反之亦然。
对于 IO 操作期间 CPU 内高地址位的路由方式,没有必要做任何特殊的事情。除了 MREQ 和 IORQ 控制信号之外,LD A,(BC) 和 IN A,(C) 之间确实没有太大区别。

有 12 个 16 位主寄存器通过门连接到两个寄存器 PC 和 I/R,连接到 16 位递增/递减电路,该电路连接到 16 位地址锁存器。
就是这样。没有特殊的逻辑处理不同的高 8 位。

然而,IN r,(C) 和 IN A,(#n) 之间存在差异。第一个选择 BC 寄存器对,后者选择先前加载了 A 和立即操作数 #n 的隐藏 WZ 对。

在这里,您可以研究 Z80 CPU 在晶体管级别的布局和行为 https://floooh.github.io/visualz80remix/https://floooh.github.io/visualz80remix/

"what is the point of doing this with these upper 8 bits?"
The other way around.
There is no point doing anything special with how upper address bits are routed within the CPU during IO operations. There is indeed not much different between say LD A,(BC) and IN A,(C) other than the MREQ and IORQ control signals.

There are 12 16-bit main registers connected via a gate to two registers PC and I/R connected to a 16 bit inc/dec circuit connected to 16 bit address latches.
Thats it. There is no special logic handling the upper 8 bits different.

However, there is a difference between IN r,(C) and IN A,(#n). The first one select the BC register pair, the latter select the hidden WZ pair which got previously loaded with A and the immediate operand #n.

Here you can study layout and behavior of the Z80 CPU at transistor level https://floooh.github.io/visualz80remix/https://floooh.github.io/visualz80remix/

~没有更多了~
我们使用 Cookies 和其他技术来定制您的体验包括您的登录状态等。通过阅读我们的 隐私政策 了解更多相关信息。 单击 接受 或继续使用网站,即表示您同意使用 Cookies 和您的相关数据。
原文