MIPS 管道转发(双重数据危险)

发布于 2024-12-17 01:16:06 字数 300 浏览 2 评论 0 原文

在帕特森和Hennessy Book:

但这不能作为 EX 危险来处理吗:

为什么转发是在MEM阶段进行的?又如何呢?有 1 个停顿(对于第二次添加,我将需要下一个 EX 中的 EX 结果)?

In the Patterson & Hennessy Book:

But can't this be handled as a EX hazard:

Why is forwarding done in the MEM stage? And how? With 1 stall (for the 2nd add, I will need result from EX in next EX)?

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沙与沫 2024-12-24 01:16:06

使用的文档 http://www.cs.cornell.edu/courses /cs3410/2011sp/faq/faq_pa1.html

我将重写 EX 和 MEM 危险条件(为了简单起见,删除 !=0 部分),在我们考虑“双重数据危险”(原始规则)之前:

EX 危险

 if (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRs)  # =EX_h_Rs 
   ) ForwardA = 10
 if (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRt)  # =EX_h_Rt
   ) ForwardB = 10

我将调用条件 EX_h_Rs 和 EX_h_Rt 以使公式更短

MEM 危险(原始条件)

 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd == ID/EX.RegisterRs)) ForwardA = 01 
 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd == ID/EX.RegisterRt)) ForwardB = 01

====

我们的示例同时具有两种类型的危险,介于(第一和第三)和(第二和第三)同时:

add $1, $1, $2 
add $1, $1, $3 
add $1, $1, $4

或(问题周期在顶部和底部标有 **

                **   
add C+A -> A ... A
           v     ?  
     add B+A -> A
                v   
          add C+ A -> A     
                **     

根据我的链接,考虑到双重 EX + MEM 危险后:(没有!=0和重新排序的布尔项),更新了 MEM Hazard 规则

让我们修改 MEM 危险的转发条件以处理“双重”数据危险

 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRs) and 
  not (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRs)) 
  ) 
   ForwardA = 01
 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRt) and 
  not (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRt)) 
 ) 
   ForwardB = 01

或使用 EX_h_* 的短记录进行相同操作,

 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRs) and 
  not ( EX_h_Rs ) 
  ) 
   ForwardA = 01
 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRt) and 
  not ( EX_h_Rt ) 
 ) 
   ForwardB = 01

这意味着:

尝试从 MEM/WB 转发到 EX;如果没有从 EX/MEM 管道寄存器转发到相同的输入操作数。

或者同样

不要尝试从 MEM/WB 转发到 EX;如果已经有来自 EX/MEM 的更新结果的转发。

我将尝试说明:

add C+A -> A     A'
                 v?  (forwarding to 3rd instruction) 
           A -> A''
                v?
          add C+A -> A          

因此,对于第三条指令,原始规则将规定第一条指令中的 A' 和第二条指令中的 A'' 都应转发(但多路复用器不能同时从两个来源获取)。并且 MEM 危险条件的修改表明,如果存在较新的 A'' 的主动转发,则不应尝试转发 A'

所以; 你的图是对的, 将会有2个EX Hazards转发;但如果已经存在活动的 EX 危险转发,则不应尝试 MEM 危险转发。

Document used http://www.cs.cornell.edu/courses/cs3410/2011sp/faq/faq_pa1.html

I'll rewrite EX and MEM hazard condition (dropping !=0 part for simplicity), before we will take in account "double data hazard" (original rules):

EX Hazard

 if (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRs)  # =EX_h_Rs 
   ) ForwardA = 10
 if (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRt)  # =EX_h_Rt
   ) ForwardB = 10

I'll call conditions EX_h_Rs and EX_h_Rt to keep formulas shorter

MEM Hazard (original condition)

 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd == ID/EX.RegisterRs)) ForwardA = 01 
 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd == ID/EX.RegisterRt)) ForwardB = 01

====

And our example with two types of hazard at once, between (1st and 3rd) & (2nd and 3rd) at same time:

add $1, $1, $2 
add $1, $1, $3 
add $1, $1, $4

or (promlem cycle is marked with ** on top and bottom)

                **   
add C+A -> A ... A
           v     ?  
     add B+A -> A
                v   
          add C+ A -> A     
                **     

According to my link, after taking into account double EX + MEM hazard: (without !=0 and reordered boolean terms), Updated rules of MEM Hazard:

Let's revise the forwarding conditions for MEM hazard to take care of 'double' data hazards

 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRs) and 
  not (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRs)) 
  ) 
   ForwardA = 01
 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRt) and 
  not (EX/MEM.RegWrite and (EX/MEM.RegisterRd == ID/EX.RegisterRt)) 
 ) 
   ForwardB = 01

Or the same using short record of EX_h_*

 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRs) and 
  not ( EX_h_Rs ) 
  ) 
   ForwardA = 01
 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd = ID/EX.RegisterRt) and 
  not ( EX_h_Rt ) 
 ) 
   ForwardB = 01

which means:

Try to forward from MEM/WB to EX; if there is no forward into same input operand from EX/MEM pipeline registers.

Or the same

Don't even try to forward from MEM/WB to EX; if there is already forwarding of more recent result from EX/MEM.

I'll try to illustrate:

add C+A -> A     A'
                 v?  (forwarding to 3rd instruction) 
           A -> A''
                v?
          add C+A -> A          

so, for third instruction original rules will say that Both A' from first instruction and A'' from second instruction should be forwarded (but mux can't be fed from two sources at single moment of time). And modifying of MEM hazard condition says that A' should not be tryed to forward if there is active forwarding of A'' which is more recent.

So; your drawing is right, there will be 2 EX Hazards forwarding; But MEM hazard forwarding should not be tried if there is already active EX Hazard forwarding.

叹倦 2024-12-24 01:16:06

这显然是本书第四版中的一个错误(其中括号不平衡)。奇怪的是,这本书的最新版本(修订版第四版)添加了一个缺失的结束语“)”,但是......最终得到了一个不正确的条件仍然

在此处输入图像描述

我认为这将是条件的正确版本:

if (MEM/WB.RegWrite
and (MEM/WB.RegisterRd ≠ 0)
and not(EX/MEM.RegWrite and (EX/MEM.RegisterRd ≠ 0)
       and (EX/MEM.RegisterRd = ID/EX.RegisterRs))
and (MEM/WB.RegisterRd = ID/EX.RegisterRs)) Forward = 01

if (MEM/WB.RegWrite
and (MEM/WB.RegisterRd ≠ 0)
and not(EX/MEM.RegWrite and (EX/MEM.RegisterRd ≠ 0)
       and (EX/MEM.RegisterRd = ID/EX.RegisterRt))
and (MEM/WB.RegisterRd = ID/EX.RegisterRt)) Forward = 01

This is clearly an error in the book's 4th edition (the parenthesis are unbalanced, for one). Curiously the book's most recent edition (4th Edition Revised) adds a missing closing ')' but... ends up with an incorrect condition still:

enter image description here

I think this would be the correct version of the conditions:

if (MEM/WB.RegWrite
and (MEM/WB.RegisterRd ≠ 0)
and not(EX/MEM.RegWrite and (EX/MEM.RegisterRd ≠ 0)
       and (EX/MEM.RegisterRd = ID/EX.RegisterRs))
and (MEM/WB.RegisterRd = ID/EX.RegisterRs)) Forward = 01

if (MEM/WB.RegWrite
and (MEM/WB.RegisterRd ≠ 0)
and not(EX/MEM.RegWrite and (EX/MEM.RegisterRd ≠ 0)
       and (EX/MEM.RegisterRd = ID/EX.RegisterRt))
and (MEM/WB.RegisterRd = ID/EX.RegisterRt)) Forward = 01
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