ADI BF533 可编程标志中断

发布于 2024-12-11 13:45:14 字数 1149 浏览 0 评论 0原文

当我按下 PF8 按钮时,我希望 blackfin 进入 ISR 并且计数器增加 1。 我应该清除或设置一个位来指示处理器已进入 ISR,但我不知道如何清除它。

我的处理器是BF533。

这是我的代码:

    // prototype
EX_INTERRUPT_HANDLER(FlagA_ISR);

volatile int count = 0;

void main(void)
{

     // Register FlagA ISR to interrupt vector group 12
     register_handler(ik_ivg12, FlagA_ISR);

     // set direction of programmable flag PF8 to input
     *pFIO_DIR &= ~PF8;
     ssync();

     // interrupt enable PF8
     *pFIO_INEN |= PF8;
     ssync();     

     // give interrupt when FIO_FLAG_D PF8 changes
     *pFIO_MASKA_D |= PF8;
     ssync();


     // Bind FlagA interrupt to IVG12
     *pSIC_IAR2 |= 0x00005000; // flag A IVG12
     ssync();


     // Enable PFA in system interrupt mask register
     *pSIC_IMASK = 0x00080000;
     ssync();

     // enable IVG12 in core interrupt mask register
     *pIMASK |= 0x00001000;
     ssync();

     // wait for interrupt
     while(count < 5);
        printf("5 interrupts received");
}

EX_INTERRUPT_HANDLER(FlagA_ISR)
{     
     count++;

     // Needed to clear or set a bit to indicate that the processor has entered the ISR
}

When I press PF8 button, I want the blackfin goes into a ISR and the counter increases 1.
I should clear or set a bit which indicates the processor has entered the ISR, but I don't know how to clear it.

My processor is BF533.

Here is my code:

    // prototype
EX_INTERRUPT_HANDLER(FlagA_ISR);

volatile int count = 0;

void main(void)
{

     // Register FlagA ISR to interrupt vector group 12
     register_handler(ik_ivg12, FlagA_ISR);

     // set direction of programmable flag PF8 to input
     *pFIO_DIR &= ~PF8;
     ssync();

     // interrupt enable PF8
     *pFIO_INEN |= PF8;
     ssync();     

     // give interrupt when FIO_FLAG_D PF8 changes
     *pFIO_MASKA_D |= PF8;
     ssync();


     // Bind FlagA interrupt to IVG12
     *pSIC_IAR2 |= 0x00005000; // flag A IVG12
     ssync();


     // Enable PFA in system interrupt mask register
     *pSIC_IMASK = 0x00080000;
     ssync();

     // enable IVG12 in core interrupt mask register
     *pIMASK |= 0x00001000;
     ssync();

     // wait for interrupt
     while(count < 5);
        printf("5 interrupts received");
}

EX_INTERRUPT_HANDLER(FlagA_ISR)
{     
     count++;

     // Needed to clear or set a bit to indicate that the processor has entered the ISR
}

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红颜悴 2024-12-18 13:45:14

我刚刚想出了如何解决这个问题。

PFx 连接到 FIO_FLAG。我们可以通过清除FIO_FLAG来清除中断状态。

这是代码:

*pFIO_FLAG_D &= ~PF8;
ssync();
//or, you can try:
*pFIO_FLAG_C |= PF8; 
ssync();

I have just figured out how to solve this question.

The PFx are connected to the FIO_FLAG. We can clear our interrupt status by clearing FIO_FLAG.

Here is the code:

*pFIO_FLAG_D &= ~PF8;
ssync();
//or, you can try:
*pFIO_FLAG_C |= PF8; 
ssync();
~没有更多了~
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