为什么 $display 在我期望的时候没有执行？
在我的基准程序中，我有这样的东西（简化的）：
// bench.sv
program tb (input clk, ...);
initial begin
...
repeat (100) begin
main_module_interface.write_index <= bench.write_index;
// drive additional inputs
...
@(clk);
$display("%t : BENCH", $realtime);
在我的主模块中，我有一个 generate 循环来创建我的 index_reg 模块
// main_module.sv
generate
for (genvar ix = 0; ix < 32; ix++) begin
index_reg #(.WIDTH(32), .INDEX(ix)) r (
.clk,
.ind(writeIFC.write_index),
...
);
end
endgenerate
然后在我的 index_reg 中 模块中，我添加了以下调试代码：
// index_reg.sv
always @ (posedge clk) begin
if (INDEX == 10) begin
$display("I see the clock");
end
end
我希望看到此输出：
I see the clock
10 : BENCH
I see the clock
20 : BENCH
I see the clock
30 : BENCH
I see the clock
40 : BENCH
I see the clock
50 : BENCH
etc.
但有时，“我看到时钟”仅每隔一次出现一次。所以我发现
10 : BENCH
I see the clock
20 : BENCH
30 : BENCH
I see the clock
40 : BENCH
50 : BENCH
etc.
我无法理解为什么会发生这种情况。有人可以指出我正确的方向吗？
In my bench program, I have something like this (simplified):
// bench.sv
program tb (input clk, ...);
initial begin
...
repeat (100) begin
main_module_interface.write_index <= bench.write_index;
// drive additional inputs
...
@(clk);
$display("%t : BENCH", $realtime);
In my main module, I have a generate loop to create my index_reg modules
// main_module.sv
generate
for (genvar ix = 0; ix < 32; ix++) begin
index_reg #(.WIDTH(32), .INDEX(ix)) r (
.clk,
.ind(writeIFC.write_index),
...
);
end
endgenerate
Then in my index_reg module, I have added the following debug code:
// index_reg.sv
always @ (posedge clk) begin
if (INDEX == 10) begin
$display("I see the clock");
end
end
I would expect to see this output:
I see the clock
10 : BENCH
I see the clock
20 : BENCH
I see the clock
30 : BENCH
I see the clock
40 : BENCH
I see the clock
50 : BENCH
etc.
But sometimes, the "I see the clock" only shows up every other time. So I see
10 : BENCH
I see the clock
20 : BENCH
30 : BENCH
I see the clock
40 : BENCH
50 : BENCH
etc.
I can't understand why that might happen. Can someone please point me in the right direction?
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（1）
在没有看到更多代码的情况下，这是我的最佳猜测。
该代码在每个
clk边沿（包括posege和negedge）上触发。该代码仅在
clk的posege上触发，每隔一段时间触发一次。这可能就是为什么您看到
BENCH的频率是我看到时钟的两倍。如果这不能回答您的问题，请提供任何人都可以编译和运行的完整代码示例。
Without seeing more of the code, here is my best guess.
That code is triggered on every
clkedge, bothposedgeandnegedge.That code is only triggered on
posedgeofclk, which is every other time.That may be why you see
BENCHtwice as often asI see the clock.If that doesn't answer your question, provide a complete code example that anyone can compile and run.