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汇编操作码问题

发布于 2024-12-03 22:46:57 字数 159 浏览 0 评论 0原文

如果我正在为 8 位计算机创建指令集，是否可以使用一些具有 2 位操作码的指令和一些具有 3 位操作码的指令？当然，每个操作码的值都会不同。

我有 3 个 r 类型指令，其操作码为 00 我有 3 个 i 类型指令，操作码为 01,11 和 10 那么我可以用操作码 100 发出指令吗？

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耳根太软 2024-12-10 22:46:57

如果您希望操作码具有不同的长度，那么您必须确保较短的操作码不是较长操作码的子字符串。也就是说，如果您有两位操作码 01 和三位操作码 010，您的解码器将如何区分？

我假设您正在尝试将操作码和操作数放入单个 8 位数量中，并将其视为一条记录。例如，您可能有指令 01000111，其中前两位是操作码，接下来的三位是第一个操作数，最后三位是第二个操作数。

如果您有两个操作码，01 和 010，您的解码器如何在这两种解释之间做出决定？

 01 000 111 - opcode 01, two three-bit arguments
 010 00 111 - opcode 010, a two-bit argument, and a three-bit argument

如果您确实想要不同长度的操作码，则需要为较长的操作码保留前缀字符串。因此，您可以使用两位指令 00、01 和 10，并且所有较长的指令都以 11 开头>。

If you want your opcodes to have varying lengths, then you have to make sure that no shorter opcode is a substring of a longer opcode. That is, if you have the two-bit opcode 01, and a three-bit opcode 010, how is your decoder going to tell the difference?

I'm assuming that you're trying to fit the opcode and the operands into a single 8-bit quantity and treat it like a record. So, for example, you might have the instruction 01000111 where the first two bits are the opcode, the next three bits are the first operand, and the last three bits are the second operand.

If you have two opcodes, 01 and 010, how does your decoder decide between these two interpretations?

 01 000 111 - opcode 01, two three-bit arguments
 010 00 111 - opcode 010, a two-bit argument, and a three-bit argument

If you really want opcodes with varying lengths, you need to reserve prefix strings for the longer opcodes. So you could have the two-bit instructions 00, 01, and 10, and all longer instructions start with 11.

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走过海棠暮 2024-12-10 22:46:57

看看arm的thumb指令集，它们显示了一个很好的操作码映射，它在某种程度上与你所说的相关。或者在github上寻找lsasim，在那里我发明了自己的指令集，有些指令只需要四位操作码来弄清楚指令是什么，有些需要8。

我假设你问的是8位指令？正如汤姆所说，你控制水平，你控制垂直，你可以做任何你想做的事。您不会从两位操作码中得到太多，例如，也许您只有两个支持这些操作码的寄存器：

00riiiii  store pc relative, r = 0 means register r0, r = 1 means register r1 iiiii is sign extended and added to the program counter for the store address

01riiiii  load pc relative

此时，如果您将自己限制为固定的 8 位指令集，那么您已经完全消耗了操作码空间的一半。你没有具体说明你在做什么。继续我的想法，所有 0xxxxxxx 操作码现在都已被消耗，你必须以 1

1000ssddd  move rd to rs (assumes rs = r0 to r3 and rd = r0 to r7
1001ssddd  move rs to rd
1010ssddd  add rs=rs+rd
1011ssddd  sub rs=rs-rd

等

开始其余的操作码。你可以弥补你想要的任何东西。关键是它必须是你可以解码的东西，这将是有效的

100ss0dd some operation
100ss1dd another operation

，但这不会：

100ss0dd some operation
100ss1dd another operation
10iiiiii branch to pc plus sign extended immediate

因为你无法从其他两条指令中唯一地解码第三条指令，当你看到 10xxxxxx 时，它是一个分支吗？如果位 2 是 0，也不是如果位 2 是 1。arm

/thumb 操作码表在这方面绘制得非常好，从顶部开始，您的指令具有较少的操作码位和更多的操作数位，您需要首先选择这些，但要知道它们占用了操作码空间的很大一部分。那么你就会有更长的操作码和更少的操作数。

Look at the thumb instruction set from arm, they show a nice opcode map which is related in some way to what you are saying. Or look for lsasim at github, where I invented my own instruction set, some instructions only need four bits of opcode to figure out what the instruction is some need 8.

I assume you are asking about 8 bit instructions? As Tom said you control the horizontal, you control the vertical you can do whatever you want. You wont get much out of the two bit opcides, maybe you have only two registers that support those opcodes, for example:

00riiiii  store pc relative, r = 0 means register r0, r = 1 means register r1 iiiii is sign extended and added to the program counter for the store address

01riiiii  load pc relative

at this point though you have completely consumed HALF of your opcode space if you limit yourself to a fixed 8 bit instruction set. you didnt specify what you were doing. continuing with my thought all of the 0xxxxxxx opcodes are now consumed you have to start the rest with a 1

1000ssddd  move rd to rs (assumes rs = r0 to r3 and rd = r0 to r7
1001ssddd  move rs to rd
1010ssddd  add rs=rs+rd
1011ssddd  sub rs=rs-rd

etc.

You can make up whatever you want. The key is it has to be something you can decode, this would be valid

100ss0dd some operation
100ss1dd another operation

but this would not:

100ss0dd some operation
100ss1dd another operation
10iiiiii branch to pc plus sign extended immediate

because you cannot uniquely decode the third instruction from the other two, when you see 10xxxxxx is it a branch? well not if bit 2 is a 0 nor if bit 2 is a 1.

The arm/thumb opcode tables are very well drawn in this regard, starting at the top you have the instructions with fewer opcode bits and more operand bits, you need to chose those first but understand they use a large portion of your opcode space. then you have longer opcodes with fewer operands.

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