Make支持这种流程吗？
想象一下我有这样的情况：
PROJECT1 := /path/to/first
PROJECT2 := /path/to/second
PROJECT3 := /path/to/third
我正在查找以收集其中的所有 c,cpp,h 文件。我有这样的东西：
PROJECT1_CPP := $(shell find $(PROJECT1) -name "*.cpp" -type "f")
PROJECT1_C := ... ( the same happens for PROJECT2 and PROJECT3 )
现在，我可以为每个目标添加目标，例如：
project1.lib: $(PROJECT1_OBJS)
...
project2.lib: $(PROJECT2_OBJS)
...
project3.lib: $(PROJECT3_OBJS)
...
这种方法的问题是：有很多重复代码（所有构建的所有操作几乎相同）。我希望能够做一些更通用的事情，例如：
PROJECTS := /path/to/first
PROJECTS += /path/to/second
PROJECTS += /path/to/third
然后以某种方式迭代它们并构建它们。像这样的伪代码：
foreach project in PROJECTS
gather C/C++ files
build them
link them
link everything together
你能给我一些关于我应该从哪里开始的指示吗？这在 Make 中可能吗？
Imagine I have this:
PROJECT1 := /path/to/first
PROJECT2 := /path/to/second
PROJECT3 := /path/to/third
I am doing a find to collect all c,cpp,h files from inside them. I have something like:
PROJECT1_CPP := $(shell find $(PROJECT1) -name "*.cpp" -type "f")
PROJECT1_C := ... ( the same happens for PROJECT2 and PROJECT3 )
Now, I could add targets for each of them like:
project1.lib: $(PROJECT1_OBJS)
...
project2.lib: $(PROJECT2_OBJS)
...
project3.lib: $(PROJECT3_OBJS)
...
The thing with this approach is: there's a lot of repetitive-code ( all the actions for all the builds are almost the same ). I would like to be able to do something more generic, like:
PROJECTS := /path/to/first
PROJECTS += /path/to/second
PROJECTS += /path/to/third
And then somehow iterate through them and build them. Something like this pseudocode:
foreach project in PROJECTS
gather C/C++ files
build them
link them
link everything together
Could you give me any pointers as to where I should start? Is this even possible in Make?
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它可以在GNUMake中完成，我不知道其他品种。
首先我们定义一个宏：
然后我们可以为每个项目调用它：
或者如果它们很多（或者我们很懒）：
或者如果我们真的很懒：
现在构建它们，而不是这样：
我们更改为：
然后更改为：
我们甚至可以将其变成另一个
$(foreach ... $(eval...))，但我们不要太过分。编辑：
你想要过分吗？过去吧：
It can be done in GNUMake, I don't know about other varieties.
First we define a macro:
Then we can call it for each project:
Or if there are a lot of them (or we're lazy):
Or if we're really lazy:
Now to build them, instead of this:
we change to this:
And then to this:
We could even turn that into another
$(foreach ... $(eval...)), but let's not go overboard.EDIT:
You want overboard? Over you go:
您可以在 GNU make 和
eval中使用宏 (define) 来动态添加规则。这并不容易，但很有效。以下代码假设项目名称为项目所在目录的名称：You can use macros (
define) in GNU make andevalto add rules on the fly. It is not easy, but it works. The following code assumes that the name of the project is the name of the directory where the project resides:我会编写一个脚本来为每个项目生成 makefile，对每个项目执行 make，如果一切顺利则删除它们
I'd write a script to generate the makefiles for each project, execute make on each and delete them if all went well