在 Makefile 中记录当前目标

发布于 2024-11-19 19:19:19 字数 414 浏览 7 评论 0原文

目前我有一个带有多目标规则的 Makefile。它记录目标，然后使用该目标集调用新的 Make。

例如，

$(LIST_OF_PRODUCTS) : 
     @echo Making $@
     @make build_product PRODUCT=$@

输出目录和二进制文件然后使用此产品名称。

如何在不调用新的 Make 实例的情况下记录当前在多目标规则中构建的目标？

我已经尝试过：

$(LIST_OF_PRODUCTS) : PRODUCT := $@
$(LIST_OF_PRODUCTS) : build_product
      @echo Making $(PRODUCT) Done.

但这不起作用。

原文

At present I have a Makefile with a multiple target rule. It records the target and then invokes a new Make with that target set.

E.g.

$(LIST_OF_PRODUCTS) : 
     @echo Making $@
     @make build_product PRODUCT=$@

The output directory and binary then use this product name..

How do I record the target currently being built in a multi-target rule without invoking a new Make instance?

I have tried:

$(LIST_OF_PRODUCTS) : PRODUCT := $@
$(LIST_OF_PRODUCTS) : build_product
      @echo Making $(PRODUCT) Done.

But this doesn't work.

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从﹋此江山别 2024-11-26 19:19:19

我想出的最好的办法是 GNU make 模板方法：

#
# Template for creating a target
define target-template
.PHONY : ${1}
${1} : TARGET_NAME:=${1}
${1} : check_target $(OBJECTS)
endef

#
#Generate targets from template
$(foreach target,$(TARGET_LIST),$(eval $(call target-template,$(target))))

然而它只是把我的问题推到了其他地方。由于当通过组调用目标时， check_target 仅被调用一次？

例如

all : target_a target_b

The best I came up with is the GNU make template method:

#
# Template for creating a target
define target-template
.PHONY : ${1}
${1} : TARGET_NAME:=${1}
${1} : check_target $(OBJECTS)
endef

#
#Generate targets from template
$(foreach target,$(TARGET_LIST),$(eval $(call target-template,$(target))))

However its just pushed my problem elsewhere. Since check_target is only called once when that targets are called via a group?

E..g