ARM 实际上并没有提供太多关于该指令的正确使用方式，但我发现它在其他地方使用，知道它需要一个地址作为在哪里读取下一个值的提示。
我的问题是，给定 ldm/stm 指令的 256 字节紧密复制循环，例如 r4-r11 x 8，在复制之前在每个指令对之间预取每个缓存行是否会更好，或者根本不执行此操作，因为相关的 memcpy 并不同时读取和写入同一内存区域。很确定我的缓存行大小是 64 字节，但也可能是 32 字节 - 在此处编写最终代码之前等待确认。
The ARM ARM doesn't actually give much in the proper way of usage on this instruction, but I've found it used elsewhere to know that it takes an address as a hint on where to read the next value.
My question is, given a 256-byte tight copy loop of ldm/stm instructions, say r4-r11 x 8, would it be better to prefetch each cache line before the copy, in between each instruction pair, or not do it at all as the memcpy in question isn't both reading and writing to the same area of memory. Pretty sure my cache line size is 64 bytes, but it may be 32 bytes - awaiting confirmation on that before writing final code here.
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来自 Cortex-A 系列程序员指南，第 17.4 章（注意：一些细节可能会ARM11 有所不同）：
From the Cortex-A Series Programmer's Guide, chapter 17.4 (NB: some details might be different for ARM11):
一个相当通用的复制循环的示例，它使用缓存行大小的
LDM/STM块和/或PLD（如果可用）可以在Linux 内核，arch/arm/lib/copy_page.S。这实现了 Igor 上面提到的关于预加载的使用，并说明了阻塞。请注意，在 ARMv7（其中缓存行大小通常为 64 字节）上，不可能将完整的缓存行作为单个操作进行
LDM（自SP以来，您只能使用 14 个寄存器） /PC为此无法触及）。因此，您可能必须使用两对/四对LDM/STM。An example of a reasonably generic copy loop that makes use of cacheline-sized
LDM/STMblocks and/orPLDwhere available can be found in the Linux kernel,arch/arm/lib/copy_page.S. That implements what Igor mentions above, regarding the use of preloads, and illustrates the blocking.Note that on ARMv7 (where the cacheline size is usually 64 Bytes) it's not possible to
LDMa full cacheline as a single op (there's only 14 regs you could use sinceSP/PCcan't be touched for this). So you might have to use two/four pairs ofLDM/STM.要真正获得“最快”的 ARM asm 代码，您需要在系统上测试不同的方法。就 ldm/stm 循环而言，这似乎对我来说效果最好：
上面的块假设您已经设置了 r6、r10、r11，并且该循环对 r11 的字而不是字节进行倒计时。我已经在 Cortex-A9 (iPad2) 上对此进行了测试，似乎在该处理器上有相当好的结果。但要小心，因为在 Cortex-A8 (iPhone4) 上，NEON 循环似乎比 ldm/stm 更快，至少对于较大的副本而言。
To really get the "fastest" possible ARM asm code, you will need to test different approaches on your system. As far as a ldm/stm loop goes, this one seems to work the best for me:
The block above assumes that your have already setup r6, r10, r11 and this loops counts down on r11 terms of words not bytes. I have tested this on Cortex-A9 (iPad2) and it seems to have quite good results on that processor. But be careful, because on a Cortex-A8 (iPhone4) a NEON loop seems to be faster than ldm/stm at least for larger copies.