VAX：VAX可以用微码模拟哪些CPU？
VAX CPU 具有可更新的微代码功能。用户可以将微代码重新上传到VAX机器，然后CPU将不再像VAX CPU那样运行，而是像PDP11 CPU那样运行。
哪些 CPU 可以使用 VAX 微码进行模拟？它可以运行 6502、8080、8086 的机器代码吗？
我的问题不是关于软件模拟器（如 SIMH 或 qemu；有一个 Alpha 软件模拟器，通过一些微代码更新加速），而是关于硬件微代码；两者都涉及制作此类微代码的理论可能性和实际微代码版本。
VAX CPUs has a updateable microcode feature. User can reupload microcode to VAX machine and then CPU will behave as not VAX CPU, but e.g. as PDP11 CPU.
What CPUs can be simulated with VAX microcode? Can it run machine code from a 6502, 8080, 8086?
My question is not about software simulators (like SIMH or qemu; there was an Alpha software simulator, speeded up by some microcode update), but about hardware microcode; both about theoretical possibility of making such microcode and practical microcode versions.
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我相信基于 RAM 的可变 VAX 微代码存储区域（“WCS”，可写控制存储）不允许有足够的空间来定义全新的指令集。
最好的情况是允许添加一些新指令或修复有问题的指令 - 就像今天 X86 CPU 的微码更新一样。
对于完整的指令集，它可能需要新的微代码 ROM/PLA 设备，并且很可能需要特殊的门阵列，尤其是后来的 VAX 8xxx CPU。
因为（除了后来的 MIPS RISC 盒子的桌面 VAXen 之外）这些都是在 IT 环境中使用的昂贵的“大铁”机器 - 我不认为它们曾经在如此超低水平的“梦想家”环境中使用过。当然，由于该设备是“作为 VAX”而不是“通用 CPU 仿真器”出售的，因此不会对计算可靠性提供有用的保证。
I believe RAM-based changeable VAX microcode storage area ("WCS", writeable control store) did not allow enough space for a whole new instruction set to be defined.
At best it would allow a few new instructions to be added or for a bug fix for a problematic instruction - a la today's microcode updates for X86 CPUs.
For a complete instruction set it would likely require new microcode ROM/PLA devices and that could well require special gate arrays, esp for the later VAX 8xxx CPUs.
Since (besides desktop VAXen which were later MIPS RISC boxes) these were expensive 'big iron' machines used in an IT context - I don't see them ever having been used in such a 'dreamer' context at this ultralow level. Certainly there would not be useful warranty ability on reliability of computation as the device was sold "as a VAX", and not a "general purpose CPU emulator".