makefile - 依赖生成器

发布于 2024-11-08 00:57:09 字数 1020 浏览 0 评论 0原文

对于我面临的一个问题，我有两个问题。

对于使用 gcc 的项目，我们采用了非递归 boilermake。接下来，我们希望将它用于其他一些交叉编译器，例如不支持依赖项生成的 -MM / MD 选项的 microchip C18。

我不想使用 makedepend 因为它很旧并且添加了对 makefile 的依赖项；此外，我相信使用 makedepend 将对象与源分开是很困难的。

最后我的问题是：

是否有任何现成的 C/C++ 依赖项生成器（类似于 -MM /-MD 选项）？（Windows 和 Linux 都需要构建支持。）

我可以使用 gcc 仅生成依赖文件并进行实际编译吗与其他编译器？这种方法会遇到任何问题吗？如果是，需要对以下内容进行哪些更改

# COMPILE_C_CMDS - 用于编译 C 源代码的命令。
定义 COMPILE_C_CMDS
    @mkdir -p $(dir $@)
    $(剥离${CC} -o $@ -c -MD ${CFLAGS} ${SRC_CFLAGS} ${INCDIRS} \
        ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} $<)
    @cp ${@:%$(后缀$@)=%.d} ${@:%$(后缀$@)=%.P}; \
     sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
         -e '/^$$/ d' -e 's/$$/ :/' < ${@:%$(后缀$@)=%.d} \
         >>> ${@:%$(后缀$@)=%.P}; \
         rm -f ${@:%$(后缀$@)=%.d}
恩德夫

原文

I have two questions to a single problem that I am facing.

We have adopted non-recursive boilermake for projects that use gcc. Going ahead we would like to use it for some other cross compilers say microchip C18 that do not support -MM / MD option for dependency generation.

I do not want to use makedepend since it's very old and adds in dependencies to makefiles; further, I believe it will be difficult separate objects from sources with makedepend.

Finally my questions:

Are there any readily available C/C++ dependency generators (similar to -MM
/ -MD options)? (Build support is required for both Windows and Linux.)

Can I use gcc to only generate dependency files and do the actual compilation
with some other compiler? Will I run into any problems with this approach?
If yes, what will be the changes required to the following

# COMPILE_C_CMDS - Commands for compiling C source code.
define COMPILE_C_CMDS
    @mkdir -p $(dir $@)
    $(strip ${CC} -o $@ -c -MD ${CFLAGS} ${SRC_CFLAGS} ${INCDIRS} \
        ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} lt;)
    @cp ${@:%$(suffix $@)=%.d} ${@:%$(suffix $@)=%.P}; \
     sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$//' \
         -e '/^$/ d' -e 's/$/ :/' < ${@:%$(suffix $@)=%.d} \
         >> ${@:%$(suffix $@)=%.P}; \
         rm -f ${@:%$(suffix $@)=%.d}
endef

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许你一世情深 2024-11-15 00:57:09

除了 makedepend 之外，我不知道还有什么（但我不完全理解你对它的厌恶）。
是的，绝对是。依赖性处理完全是 GCC 与 GNUMake 对话的问题（我希望您正在使用 GNUMake）。另一个编译器不需要知道任何有关它的信息。

# COMPILE_C_CMDS - Commands for compiling C source code.
define COMPILE_C_CMDS
    @mkdir -p $(dir $@)
    # This line generates the dependency file foo.d
    $(strip ${CC} -o $@ -MM -MF ${@:%$(suffix $@)=%.d} ${CFLAGS} ${SRC_CFLAGS} \
        ${INCDIRS} ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} lt;)
    # This one actually compiles. You must adapt the sytax for your compiler.
    $(strip ${SOME_OTHER_COMPILER} -o $@ -c ${CFLAGS} ${SRC_CFLAGS} ${INCDIRS} \
        ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} lt;)
    @cp ${@:%$(suffix $@)=%.d} ${@:%$(suffix $@)=%.P}; \
     sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$//' \
         -e '/^$/ d' -e 's/$/ :/' < ${@:%$(suffix $@)=%.d} \
         >> ${@:%$(suffix $@)=%.P}; \
         rm -f ${@:%$(suffix $@)=%.d}
endef

PS 如果您将其作为模式规则而不是定义的命令，而是一次只做一件事，那么您的 makefile 可能会更干净。

I don't know of any, other than makedepend (but I don't entirely understand you aversion to it).
Yes, definitely. The dependency handling is entirely a matter of GCC talking to GNUMake (I hope you're using GNUMake). The other compiler doesn't need to know anything about it.

# COMPILE_C_CMDS - Commands for compiling C source code.
define COMPILE_C_CMDS
    @mkdir -p $(dir $@)
    # This line generates the dependency file foo.d
    $(strip ${CC} -o $@ -MM -MF ${@:%$(suffix $@)=%.d} ${CFLAGS} ${SRC_CFLAGS} \
        ${INCDIRS} ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} lt;)
    # This one actually compiles. You must adapt the sytax for your compiler.
    $(strip ${SOME_OTHER_COMPILER} -o $@ -c ${CFLAGS} ${SRC_CFLAGS} ${INCDIRS} \
        ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} lt;)
    @cp ${@:%$(suffix $@)=%.d} ${@:%$(suffix $@)=%.P}; \
     sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$//' \
         -e '/^$/ d' -e 's/$/ :/' < ${@:%$(suffix $@)=%.d} \
         >> ${@:%$(suffix $@)=%.P}; \
         rm -f ${@:%$(suffix $@)=%.d}
endef

P.S. Your makefile will probably be cleaner if you do this as a pattern rule, not a defined command, but one thing at a time.

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