别名的定义/含义？ （CPU缓存架构）
我对CPU缓存和物理地址之间的“别名”的含义有点困惑。 首先我在维基百科上找到了它的定义：
但是，VIVT 存在别名问题，其中多个不同的虚拟地址可能引用相同的物理地址。另一个问题是同音异义，即相同的虚拟地址映射到多个不同的物理地址。
但过了一会儿我在演示文稿上看到了不同的定义(ppt) DAC'05：“用于嵌入式处理器的节能物理标记缓存 虚拟内存”
缓存别名和同义词：
别名：来自不同上下文的相同虚拟地址映射到不同的物理地址同义词：不同的虚拟地址映射到相同的物理地址（数据共享）< /p>
由于我不是母语人士，所以我不知道哪个是正确的， 虽然我觉得维基百科的定义是正确的。
编辑：
CPU缓存中的“别名”概念通常意味着“同义”，反之就是“同音”。在更一般的层面上，“别名”是“令人困惑的”或“混乱的”或类似的东西。所以在我看来，“别名”恰好意味着（X->Y）的映射是“非双射”，其中
“X”=已缓存的物理地址单元的子集。 （每个元素是一行字节）
“Y”= 有效缓存行的集合。 （元素 a 也是“线”）
I'm a little confused by the meaning of "Aliasing" between CPU-cache and Physical address.
First I found It's definition on Wikipedia :
However, VIVT suffers from aliasing problems, where several different virtual addresses may refer to the same physical address. Another problem is homonyms, where the same virtual address maps to several different physical addresses.
but after a while I saw a different definition on a presentation(ppt)
of DAC'05: "Energy-Efficient Physically Tagged Caches for Embedded Processors with
Virtual Memory"
Cache aliasing and synonyms:
Alias: Same virtual address from different contexts mapped to different physical addresses Synonym: Different virtual address mapped to the same physical address (data sharing)
As I'm not a native speaker, I don't know which is correct,
though I feel the Wiki's definition is correct.
Edit:
Concept of "aliasing" in CPU cache usually means "synonym", on the contrary is "homonym". In a more generic level, "aliasing" is "confusing" or "chaos" or something like that. So In my opinion, "aliasing" exactly means the mapping of (X->Y) is "not bijective", where
"X" = the subset of physical addresses units which has been cached. (each element is a line of byte)
"Y" = the set of valid cache lines. (elements a also "line")
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（2）
您需要首先了解虚拟内存，但基本上是这样的：
您的程序使用的内存地址不是 RAM 使用的物理地址；而是您的程序使用的内存地址。它们是由CPU映射到物理地址的虚拟地址。
多个虚拟地址可以指向同一个物理地址。
这意味着您可以在缓存的不同部分中拥有相同数据的两个副本，而无需知道这一点......并且它们不会正确更新，因此您会得到错误的结果。
编辑：
参考摘录：
对于那些仍然不相信的人：
You'd need to learn about Virtual Memory first, but basically it's this:
The memory addresses your program uses aren't the physical addresses that the RAM uses; they're virtual addresses mapped to physical addresses by the CPU.
Multiple virtual addressses can point to the same physical address.
That means that you can have two copies of the same data in separate parts of the cache without knowing it... and they wouldn't be updated correctly, so you'd get wrong results.
Edit:
Exerpt of reference:
For those who are still unconvinced:
@Wu 是的，您确实需要了解一点虚拟内存才能了解别名。首先让我给你几行解释：
假设我有 1GB 的 RAM（物理内存）。我想向我的程序员展示我有 4GB 内存然后我使用虚拟内存的观点。在虚拟内存中，程序员认为他/她有 4GB，并从这个角度编写程序。他们不需要知道存在多少物理内存。优点是程序可以在具有不同 RAM 量的计算机上运行。此外，该程序可以与其他程序一起在计算机上运行（也消耗物理内存）。
这就是虚拟内存的实现方式。我将给出一个简单的 1 级虚拟内存系统（Intel 有一个 2/3 级系统，这使得解释变得复杂。
我们的问题是程序员有 40 亿个地址，而我们只有 10 亿个位置来放置这些地址）因此，需要将虚拟地址空间中的地址映射到物理地址空间，这是使用称为页表的简单索引表来完成的，您可以使用虚拟地址访问页表，它会为您提供物理地址。该内存位置的地址。
一些细节：记住这一点。物理空间只有1GB，因此系统只将最近访问的1GB保留在物理内存中，并将其余部分保留在系统磁盘中。当程序请求特定地址时，我们首先检查它是否已经在物理内存中。如果没有，则从磁盘放入物理内存，然后返回到程序，后者称为页面错误：
因为之间存在映射 。虚拟->物理地址，可以使两个虚拟地址映射到同一个物理地址。这就像说如果我查看我的虚拟页表
地址 X 和 Y，在这两种情况下我都会得到相同的物理地址。
下面我展示了一个 8 条目页表的简单示例。假设有 8 个虚拟地址，而只有 3 个物理地址。页表如下所示：
0: 1 1: On disk 2: 2 3: 1 4: On disk 5: On disk 6: On disk 7: 0 This mean that if virtual address 4 is accessed, you will get a page fault. If virtual addresses 3 is accessed, you will get the physical address 1 In this case, virtual addresses 0 and 3 are aliasing to the same physical address 1 for both of them注意：我在各处都使用了术语“物理地址”和“虚拟地址”来简化概念。在真实系统中，虚拟到物理的映射不是基于每个地址的。相反，我们将虚拟空间块映射到物理空间。每个块称为一个页面（这就是映射表称为页表的原因），块的大小是 ISA 的属性，例如，Intel x86 有 4Kbyte 页面。
@Wu yes you do need to understand virtual memory little to understand aliasing. Let me give you a few lines of explanation first:
Lets say I have a RAM (physical memory) of 1GB. I want to present my programmer with a view that I have 4GB memory then I use virtual memory. In virtual memory, the programmer thinks that he/she has 4GB and writes their program from that perspective. They do not need to know how much physical memory exists. The advantage is that program will run on computers with different amounts of RAM. Also, the program can run on a computer together with other programs (also consuming physical memory).
So here is how virtual memory is implement. I will give a simple 1-level virtual memory system (Intel has a 2/3-level system which just makes it complicated for explanation.
Our problem here is that the programmer has 4 Billion addresses and we only have 1 billion places to put those 4 billion addresses. So, addresses are from the virtual address space need to be mapped to physical address space. This is done using a simple index table called a Page Table. You access a Page Table with a virtual address and it gives you the physical address of that memory location.
Some details: Remember that physical space is only 1GB so the system only keeps the most recently accessed 1GB worth in physical memory and keeps the rest in system disk. When the program requests a particular address, we first check if it is already in physical memory. If so, it is returned to the program. If not, it brought from the disk and put into physical memory and then returned to the program. The latter is known as a Page Fault.
Coming back to aliasing in context of virtual memory: since there is mapping between virtual -> physical addresses, it is possible to make two virtual addresses to map to the same physical address. it is the same as saying that if I look at my page table for virtual
address X and Y, I will get the same physical address in BOTH cases.
I show below a simple example of a 8 entry Page Table. Say there are 8 vitual addresses and only 3 physical addresses. The page table looks as follows:
0: 1 1: On disk 2: 2 3: 1 4: On disk 5: On disk 6: On disk 7: 0 This mean that if virtual address 4 is accessed, you will get a page fault. If virtual addresses 3 is accessed, you will get the physical address 1 In this case, virtual addresses 0 and 3 are aliasing to the same physical address 1 for both of themNOTE: I used the terms physical and virtual addresses everywhere to simplify the concept. In a real system, the virtual-to-physical mapping is not on a per address basis . Instead, we map chunks of virtual space to physical space. Each chunk is called a Page (thats why the mapping table is called a page table) and the size of the chunk is a property of the ISA, e.g., Intel x86 has 4Kbyte pages.