在 GPU 编程中使用条件时,工作项会执行什么?
如果您有工作项在波前执行,并且有一个条件,例如:
if(x){
...
}
else{
....
}
工作项执行什么?波前中的所有工作项都将执行第一个分支(即 x == true )吗?如果没有 x 为假的工作项,那么条件的其余部分将被跳过?
如果一个工作项采用替代路径,会发生什么情况。我是否被告知所有工作项也将执行备用路径(因此执行两个路径?)。为什么会出现这种情况以及如何不扰乱程序执行
If you have work items executing in a wavefront and there is a conditional such as:
if(x){
...
}
else{
....
}
What do the work-items execute? is it the case whereby all workitems in the wavefront will execute the first branch (i.e. x == true
). If there are no work-items for which x is false, then the rest of the conditional is skipped?
What happens if one work-item takes the alternative path. Am I told that all workitems will execute the alternate path as well (therefore executing both paths?). Why is this the case and how does it not mess up the program execution
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NVIDIA GPU 使用条件执行来处理 SIMD 组内的分支分歧(“扭曲”)。在您的
if..else
示例中,两个分支均由发散扭曲中的每个线程执行,但那些不遵循给定分支的线程将被标记并执行改为空操作。这是经典的分支发散惩罚 - 扭曲间分支发散需要两次通过代码部分才能退出扭曲。这并不理想,这就是为什么面向性能的代码试图尽量减少这种情况。人们经常遇到的一件事是假设“首先”执行发散路径的哪一部分。由于二次猜测发散扭曲中的内部执行顺序,导致了一些非常微妙的错误。对于更简单的条件,NVIDIA GPU 支持 ALU 处的条件评估,这不会导致发散,并且对于整个扭曲遵循相同路径的条件,显然也没有惩罚。
NVIDIA gpus use conditional execution to handle branch divergence within the SIMD group ("warp"). In your
if..else
example, both branches get executed by every thread in the diverging warp, but those threads which don't follow a given branch are flagged and perform a null op instead. This is the classic branch divergence penalty - interwarp branch divergence takes two passes through the code section to retire for warp. This isn't ideal, which is why performance oriented code tries to minimize this. One thing which often catches out people is making an assumption about which section of a divergent path gets executed "first". The have been some very subtle bugs cause by second guessing the internal order of execution within a divergent warp.For simpler conditionals, NVIDIA GPUs support conditional evaluation at the ALU, which causes no divergence, and for conditionals where the whole warp follows the same path, there is also obviously no penalty.