错误：非法输出或输入端口连接

Question

module stimulus;
    reg [511:0]FROM_LS;
    reg CLOCK;
    reg [2:0]HMIC_CTRL;
    reg [20:0]BRANCH_CTRL;
    reg  [63:0]TO_IF_ID;
    reg FLUSH_CTRL;
    reg [20:0]TO_LS;
        
    // setup clock
    initial
     begin
            inst_line_buf ILB(FLUSH_CTRL,TO_LS,FROM_LS,CLOCK,HMIC_CTRL,BRANCH_CTRL,TO_IF_ID);

      #10 CLOCK = ~CLOCK;
  
    // apply stimulus
  
      FROM_LS[511:480]= 32'b00011_00000_00100_01100_11100_10111_01;
      FROM_LS[479:448]=32'b000_11000_00100_01111_11111_00011_1000;
  
      HMIC_CTRL[2:0]=3'b000;
      BRANCH_CTRL[20:0]=20'b00000_00000_00000_00000;
      #2 $display("FLUSH CONTROL=%b, TO_LS= %b",FLUSH_CTRL,TO_LS);
    end
endmodule

我收到以下错误：

# Loading work.inst_line_buf
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (512 or 512) does not match connection size (1) for port 'from_LS'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(1).
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (1 or 1) does not match connection size (21) for port 'clk'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(2).
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (3 or 3) does not match connection size (512) for port 'hmic_ctrl'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(3).
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (21 or 21) does not match connection size (1) for port 'branch_ctrl'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(4).
#         Region: /stimulus/ILB
# ** Error: (vsim-3053) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): Illegal output or inout port connection for "port 'to_if_id'".
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (64 or 64) does not match connection size (3) for port 'to_if_id'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(5).
#         Region: /stimulus/ILB
# ** Error: (vsim-3053) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): Illegal output or inout port connection for "port 'flush_ctrl'".
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (1 or 1) does not match connection size (21) for port 'flush_ctrl'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(6).
#         Region: /stimulus/ILB
# ** Error: (vsim-3053) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): Illegal output or inout port connection for "port 'to_LS'".
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (21 or 21) does not match connection size (64) for port 'to_LS'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(7).
#         Region: /stimulus/ILB
# Error loading design

Answer 1

除非您向我们展示完整的错误消息、您的 vsim 命令行和一些相关的 Verilog 代码，否则我们所能提供的只是通过 Google 搜索您的错误消息的建议。

例如，来自 modelsim_FAQ：

ModelSim 模拟选项尚未
已正确设置（项目设置>
模型模拟>选项）进行以下操作
更改：右键单击模拟
项目流程窗口中的选项卡或
选择项目>设置>模拟
测试平台模块名称：指定您的
测试平台模块名称 顶层
测试台中的实例名称：
DUT 的实例名称 请参阅
下面的屏幕截图为示例。

更新：现在您已经添加了一些代码，ILB 看起来很可疑。您首先将其用作 inst_line_buf 模块的实例名称，然后在 initial 块中再次使用它，就像看起来像函数或任务调用一样。我的猜测是您希望它位于 initial 块之外，但具有端口连接：

inst_line_buf ILB (FROM_LS,CLOCK,HMIC_CTRL,TO_IF_ID,FLUSH_CTRL,TO_LS);