如何导致 TLB 与用户进程发生冲突?

发布于 2024-10-30 21:43:46 字数 131 浏览 8 评论 0原文

我目前的工作需要在Intel Core系列的CPU上生成指定数量的TLB未命中,但进展并不顺利。我尝试了很多方法,但它们的 TLB 命中率都很高。有谁知道有关 x86 TLB 如何工作的一些有用信息,或者在用户进程中生成大量 TLB 未命中的方法?

My current work needs to generate a specified number of TLB misses on CPU of Intel Core series, while it's not going on well. I've tried many methods but all of them have a very high rate of TLB hit. Does anyone know some useful information about how x86 TLB works, or some method to generate large number of TLB misses within a user process?

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时间你老了 2024-11-06 21:43:46

TLB 是 CPU 用来记住与虚拟地址关联的物理地址的高速缓存。虚拟地址空间被分成页,通常每页 4KB。 TLB 为每个可能的虚拟页都有一个空间,其中包含与其关联的物理页的地址。当您尝试访问物理地址尚未加载的页面时,就会发生 TLB 未命中。因此,为了最大限度地提高未命中率,您需要最大限度地提高访问的不同页面的数量。

不幸的是,事情并没有那么简单。简单的 TLB 未命中将从页表层次结构中读取条目以找到正确的物理地址。但这仅在您访问具有物理地址的页面时才会发生。操作系统将确定哪些虚拟地址具有哪些物理地址,如果您尝试从任何其他地址读取数据,则会导致页面错误。页面错误处理程序将终止非法访问该页面的程序,或者移动数据以将物理页面放入该虚拟地址中。

导致尽可能多的 TLB 未命中的最佳方法是:

  1. 分配操作系统允许的尽可能多的内存。您应该交替分配大块和小块,在分配另一个大块后释放小块。这有望最大限度地提高碎片率,将您的内存分散到尽可能多的页面上。
  2. 创建一个列表,其中包含您分配的内存中使用的每个不同页面的一个地址。您还可以添加您知道可读的其他页面,例如包含代码的页面。
  3. 循环遍历该列表,从每一页读取数据。由于操作系统需要释放物理页以放入虚拟页,因此它将(希望)使用先前与循环中的其他页关联的物理页,从而导致最大数量的 TLB 未命中。

当可用 RAM 变低时,未命中次数将会增加,因为操作系统必须移动更多物理页来满足程序的需求,因此最好同时运行其他占用内存的进程。

The TLB is a cache used by the CPU to remember the physical address associated with a virtual address. The virtual address space is split into pages, usually 4KB each. The TLB has a space for each possible virtual page which contains the address of the physical page associated with it. A TLB miss occurs when you try to access a page whose physical address has not been loaded yet. Therefore, to maximize misses, you need to maximize the number of different pages accessed.

Unfortunately, it is not that simple. A simple TLB miss would read entries from the page table hierarchy to find the proper physical address. But this only occurs if you access a page which has a physical address. The OS will determine what virtual addresses have what physical addresses, and if you try to read from any others, you will cause a page fault. The page fault handler will either terminate your program for illegally accessing that page or move data around to put a physical page in that virtual address.

The best way to cause as many TLB misses as possible is to:

  1. Allocate as much memory as the OS will let you. You should alternate allocating large and small pieces, freeing the small pieces after allocating another large one. This will hopefully maximize fragmentation, spreading your memory out over as many pages as possible.
  2. Create a list with one address from every different page used in the memory you allocated. You can also add other pages which you know are readable, such as the pages containing your code.
  3. Loop through this list, reading data from each page. As the OS needs to free up physical pages to put in your virtual pages, it will (hopefully) use the physical pages previously associated with other pages in your loop, causing the maximum number of TLB misses.

The number of misses will go up as available RAM gets low, because the OS will have to move more physical pages around to satisfy your program's needs, so it is good to have other, memory hungry processes running at the same time.

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