文件格式无法识别;使用 GCC 视为链接描述文件
我对 Makefile 还很陌生,我正在尝试将 3 个文件 file1.c、file2.c 和 file1.h 构建为一个名为 exFile 的可执行文件。这就是我得到的:
all: exFile
exFile: file1.o file2.o
gcc -Wall -g -m32 repeat.o show.o -o repeat
file1.o: file1.c file1.h
gcc -Wall -g -m32 -S file1.c -o file1.o
file2.o: file2.c
gcc -Wall -g -m32 -S file2.c -o file2.o
我在网上搜索了这种格式的 makefile,但我空手而归,所以我想知道是否有人可以提供帮助。当它尝试编译时,我得到:
usr/bin/ld:file1.o:1: file format not recognized; treating as linker script
我已经使用汇编文件编译了程序,但我不确定如何处理 c 文件或 file1.h 文件。 file1.c 包含 file1.h 所以我必须链接它们(我认为?)。任何建议或参考链接将不胜感激
I am pretty new to Makefiles and i am trying to build an executable from 3 files, file1.c, file2.c, and file1.h into an executable called exFile. Here's what I got:
all: exFile
exFile: file1.o file2.o
gcc -Wall -g -m32 repeat.o show.o -o repeat
file1.o: file1.c file1.h
gcc -Wall -g -m32 -S file1.c -o file1.o
file2.o: file2.c
gcc -Wall -g -m32 -S file2.c -o file2.o
I've searched the web for makefiles in this format, but i came up empty handed so i was wondering if someone can help. When it tries to compile i get:
usr/bin/ld:file1.o:1: file format not recognized; treating as linker script
I've compiled programs using assembly files but I'm not to sure what to do with c files or the file1.h file. file1.c includes file1.h so i have to link them (I think?). Any suggestions or links to a reference would be appreciated
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您的
gcc
命令行有两个问题。首先,您指定-S
标志,这会导致 gcc 发出汇编代码,而不是目标代码。其次,您缺少-c
标志,该标志告诉 gcc 将文件编译为目标文件,但不链接它。如果您仅删除-S
且不更改任何其他内容,最终将得到一个名为file1.o
的可执行程序和另一个名为file2.o
的可执行程序>,而不是两个目标文件。除了这些错误之外,您还可以通过使用模式规则来简化 makefile。我建议你尝试以下方法:
或者,正如 EmployedRussian 指出的那样,你可以使用更简单的东西,利用 GNU make 的更多内置功能:
You have two problems with your
gcc
command-line. First, you're specifying the-S
flag, which causes gcc to emit assembly code, rather than object code. Second, you're missing the-c
flag, which tells gcc to compile the file to an object file, but not link it. If you just remove-S
and change nothing else, you'll end up with an executable program namedfile1.o
and another namedfile2.o
, rather than two object files.Besides those errors, you could simplify your makefile by the use of pattern rules. I suggest you try the following instead:
Or, as EmployedRussian points out, you can go with something even more minimal that leverages more of the built-in features of GNU make:
gcc 的
-S
开关告诉它输出汇编程序,因此:将汇编程序放入
file1.o
但您可能希望编译file1.c< /code> 到目标代码:
当链接器获取您的
file1.o
时,它会感到困惑,因为当链接器期望目标代码时file1.o
是汇编程序,因此您的错误。因此,请去掉
file1.o
和file2.o
的-S
开关。The
-S
switch to gcc tells it to output assembler so this:Is putting assembler into
file1.o
but you want, presumably, to compilefile1.c
into object code:When the linker gets your
file1.o
it is confused becausefile1.o
is assembler when the linker is expecting object code, hence your error.So get rid of the
-S
switches forfile1.o
andfile2.o
.