CPU真的从不直接从内存中获取任何东西吗？
我听说cpu只是从EIP寄存器中获取指令，从不直接从内存中获取指令。
但是据我所知，EIP只是存储下一条指令的地址，指令本身仍然在内存中。如果CPU从不取内存，它怎么知道下一条指令是什么实际上是？
更新
顺便说一句，我知道有 x86、x64、x87 架构，但是 x86-64 属于哪个，x86 或 x64 ??
I hear that cpu just fetches instruction from the EIP register,never fetches from memory directly.
But AFAIK,EIP just stores the address of the next instruction,the instruction itself is still in the memory.If CPU never fetches memory,how can it know what the next instruction actually is?
UPDATE
BTW,I know there're x86,x64,x87 architectures,but which does x86-64 belong to,x86 or x64??
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您的问题的简单答案是“不，这不是真的”。
由于缓存、指令流水线、分支预测等原因，图片并不是很简单。但是，指令指针就是一个指针。它不存储操作码。
The simple answer to your question is "no, it's not true".
The picture isn't very simple due to caching, instruction pipeline, branch prediction etc. However, the instruction pointer is just that, a pointer. It doesn't store opcodes.
EIP（扩展指令指针）应该保存指令的地址。这只是一种记录当前正在处理的指令（或者有时是下一个要处理的指令）的选项卡的方法。
指令本身存储在内存（HDD、RAM、高速缓存）中，需要由 CPU 读取。
也许您听到的意思是，由于通常使用如此多级别的缓存，因此提取需要访问 RAM 的情况很少见。
EIP (Extended Instruction Pointer) should hold the address of the instruction. It's just a way to keep a tab of which instruction is being processed currently (or sometimes, which instruction to process next).
The instructions themselves are stored in the Memory (HDD, RAM, Cache) and need to be fetched by the CPU.
Maybe what you heard meant that since so many levels of caches are used generally it's quite rare that the fetch needs to access the RAM..
好吧，我不知道你的问题有什么意义。
是的，CPU（广义上）确实从内存中获取数据。它有许多内存管理设备（用于缓存行处理和流水线）。事实上，“管道”将指令放入 L1 缓存中。事实上，指令处理器本身只从那里获取。实际上，处理器可能根本不会查看 EIP（除非指令直接将其用作操作数）。
所以真正的答案是，给自己找一篇关于 i86 处理器设计的维基百科文章，然后尽情享受吧。您将能够准确地知道在哪里发生了什么。
干杯
Well I don't know the point to your question.
Yes the CPU (in a broad sense of the word) does fetch from memory. It has a number of memory management devices (for cache line handling and pipelining). In fact, the 'pipeline' puts the instructions in L1 cache. Indeed, the instruction processor itself only fetches from there. The processor in reality probably never even looks at EIP (unless an instruction uses it directly as an operand).
So the real answer would be, find yourself a wikipedia articale on i86 processor design, and have a ball. You'll be able to know exactly what happens where.
Cheers
事实并非如此。 CPU通过缓存访问内存，所以你可以说它不直接这样做。 （DMA 通道还可以在内存和 IO 之间传输数据，而无需接触 CPU）。
是的，CS:EIP 指向内存，指向下一条要执行的指令，但您也可以使用直接地址，例如（将地址 0x0800 的内容加载到 AX 寄存器，默认情况下这是相对于 DS 段的）：
Not true in that way. CPU accesses memory thru the cache, so you can kinda say that it does not do it directly. (Also DMA cahnnel can transfer data between memory and IO without ever touching CPU).
Yes, CS:EIP points to the memory, to the next instruction to execute, but you can use direct addresses too for example (load the content of the address 0x0800 to the AX register, by default this is relative to DS segment):