从目标文件列表 (*.o) 构建库 (lib.a) 的 makefile

发布于 2024-10-26 19:58:44 字数 492 浏览 4 评论 0原文

我有一个问题,因为我从未编写过任何 makefile。因此,如果有人能帮助我,我会变得很高兴。我有很多不同的 .o 文件,它们存储在不同的文件夹中。例如:

文件夹1:obj1.o
文件夹2:obj2.o
folder3: obj3.o

我需要 makefile,它将从我发送到 makefile(如参数)的文件构建库。参数也应该是 makefile,并包含有关存储必要文件的文件夹的信息。

例如,我想从存储在folder1和folder2中的对象构建lib,而不使用folder3。因此,我作为参数发送到主 makefile 的 makefile 必须包含到folder1和folder2的路由:

local_libs := ../folder1
local_libs += ../folder2

主 makefile 应该解析该信息并调用 libtool 实用程序来从此文件夹中的文件创建 lib。有人可以帮忙吗?

我想这很容易实现,例子会很棒!

I have a problem because i have never written any makefile. So if any could help me I become happy. I have a lot of different .o files, which stored in the different folders. For example:

folder1: obj1.o
folder2: obj2.o
folder3: obj3.o

I need makefile, which will build the library from files which I send to makefile like param. Param should be makefile too and include info about folders where stored necessary files.

For example I would like to build lib from objects stored at folder1 and folder2 without folder3. So makefile which I send as param to the main makefile must include routes to folder1 and folder2:

local_libs := ../folder1
local_libs += ../folder2

main makefile should parse that info and call libtool utilite for creating lib from files at this folders. Could anybody help?

I suppose it is easy for realization, example will be great!

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彩虹直至黑白 2024-11-02 19:58:44

您需要一个输入 .o 文件、输出 .a 文件并调用 ar 命令来完成工作的规则。像这样的东西:

lib.a: $(OBJECTS)
    ${AR} -cr ${@} ${^}

You need a rule that inputs the .o files, outputs the .a file and calls the ar command to do the work. Something like:

lib.a: $(OBJECTS)
    ${AR} -cr ${@} ${^}
海夕 2024-11-02 19:58:44

GNU make 不支持在命令行上传递参数“到 makefile”。

在执行 makefile 时,您有两种基本机制用于设置 make 使用的参数(我假设您正在使用 GNU make,并且并非他的所有建议都适用于其他 make):

  • 写入子 makefile,可能使用脚本。如果你的 makefile 有一行像

    包含文件.mk
    

    gmake 将包含 file.mk 的内容。更改 file.mk 的内容就可以更改 makefile 的行为。

  • Make 可以在设置时从环境变量中获取变量值。这提供了一种强大的机制,让用户可以自定义 makefile 的行为。

GNU make does not support passing parameters "to the makefile" on the command line.

You have two basic mechanism for setting parameters to be used by make while executing a makefile (I'm assuming that you are using GNU make, and not all of his advice will apply to other makes):

  • Write to submakefiles, possibly using a script. If you makefile has a line like

    include file.mk
    

    gmake will include the contents of file.mk. Change the contents of file.mk and you change the behavior of your makefile.

  • Make can take variable values from environment variables when set. This provides a powerful mechanism for letting the user customize the behavior of your makefile.

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