“处理器将 I/O 指令执行与外部总线活动同步”是什么意思？意思是？
以下摘录自英特尔® 64 和 IA-32 架构软件开发人员手册，第 1 卷：基本架构 (p.432，http://www.intel.com/Assets/PDF/manual/253665.pdf)
当使用 I/O 地址空间时而不是内存映射 I/O，情况是 有两个方面不同：
• 处理器从不缓冲 I/O 写入。因此，I/O 的严格排序 操作由处理器强制执行。 （与内存映射 I/O 一样，它是 芯片组可以在某些 I/O 范围内进行后写入。）
• 处理器将 I/O 指令执行与外部总线活动同步 （见表14-1）。
表 14-1。 I/O 指令序列化
------------------+----------------------------------+----------------------------------
| Processor Delays Execution of … | Until Completion of …
+---------------+------------------+-----------------+----------------
Instruction Being | Current | Next | |
Executed | Instruction? | Instruction? | Pending Stores? | Current Store?
------------------+---------------+------------------+-----------------+----------------
IN | Yes | | Yes |
INS | Yes | | Yes |
REP INS | Yes | | Yes |
OUT | | Yes | Yes | Yes
OUTS | | Yes | Yes | Yes
REP OUTS | | Yes | Yes | Yes
------------------+---------------+------------------+-----------------+----------------
谁能解释一下这张表的含义吗？特别是，我不知道这个“待定商店”或“当前商店”是什么意思。
The following excerpt is from Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture (p.432, http://www.intel.com/Assets/PDF/manual/253665.pdf)
When the I/O address space is used instead of memory-mapped I/O, the situation is
different in two respects:
• The processor never buffers I/O writes. Therefore, strict ordering of I/O
operations is enforced by the processor. (As with memory-mapped I/O, it is
possible for a chip set to post writes in certain I/O ranges.)
• The processor synchronizes I/O instruction execution with external bus activity
(see Table 14-1).
Table 14-1. I/O Instruction Serialization
------------------+----------------------------------+----------------------------------
| Processor Delays Execution of … | Until Completion of …
+---------------+------------------+-----------------+----------------
Instruction Being | Current | Next | |
Executed | Instruction? | Instruction? | Pending Stores? | Current Store?
------------------+---------------+------------------+-----------------+----------------
IN | Yes | | Yes |
INS | Yes | | Yes |
REP INS | Yes | | Yes |
OUT | | Yes | Yes | Yes
OUTS | | Yes | Yes | Yes
REP OUTS | | Yes | Yes | Yes
------------------+---------------+------------------+-----------------+----------------
Can anyone explain me what this table means? Especially, I have no idea what this 'pending stores' or 'current store' means.
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（1）
处理器有一个写入队列，因此当将某些内容存储到内存时，数据只会进入队列。一旦数据进入队列，该指令就被视为完成——您可以开始执行下一条指令，而无需等待数据从队列进入目标内存。
但 I/O 空间不相同。如果您正在从 I/O 空间读取数据，则直到当时内存写入队列中的所有数据都已写入内存后，您的读取才会开始。如果您正在写入 I/O 空间，该指令会立即开始执行，但只有在写队列中的所有数据都已写出并且正在写入的数据之后，下一条指令才能执行当前指令已被写入。
原因相当简单：当您处理内存时，处理器知道所有地址映射，因此，如果（例如）您向内存写入一些内容，并且（几乎）立即将其读回，处理器可以/将检测数据实际上在写入队列中，并确保您的读取获取当前数据。
然而，对于 I/O 空间，处理器不知道对特定地址的读/写可能与内存空间中的先前读/写有何关联。例如，您可能会将一些数据发送到内存，然后告诉您的显卡使用该数据作为纹理。你可能不太清楚，但 CPU 没有真正的方法来告诉，所以它必须做出悲观的假设，并等待你写入内存的数据实际到达那里（或者至少离开 CPU），然后再告诉显卡使用该数据。
The processor has a write queue, so when store something to memory, the data just goes into the queue. The instruction is considered complete as soon as the data goes into the queue -- you can start executing the next instruction without waiting for the data to go from the queue to the destination memory.
I/O space is not the same though. If you're reading from I/O space, your read won't even begin until all data in the memory write queue at that time has been written to memory. If you're writing to I/O space, the instruction starts to execute immediately, but the next instruction can't execute until all the data in the write queue has been written out and the data being written by the current instruction has been written.
The reason for this is fairly simple: when you're dealing with memory, the processor knows about all the address mapping, so if (for example) you write something to memory, and (almost) immediately read it back in, the processor can/will detect that the data is actually in the write queue, and and ensure that your read gets the current data.
With I/O space, however, the processor doesn't know how a read/write from/to a particular address might be related to a previous read/write in the memory space. For example, you might be sending some data to memory, and then telling your graphics card to use that data as a texture. You might not be as well, but the CPU has no real way to tell, so it has to make the pessimistic assumption, and wait for the data you wrote to memory to actually get there (or at least leave the CPU) before it tells the graphics card to use that data.