为什么结构必须字对齐？
可能的重复：
内存对齐的目的
为什么结构或任何内存分配（如 int、char）必须字对齐。它有什么好处？
更新： 主要原因是，如果没有内存对齐，数据类型（int）的一部分可能位于一个物理页中，而其他部分可能位于另一个物理页中？
我觉得这个理由更有力？
Possible Duplicate:
Purpose of memory alignment
Why does structure or any memory allocations like int,char have to be word aligned. What advantage does it serve?
Update:
Is the main reason, being if not memory aligned, there is possibility that part of a data type(int) is in one physical page and other part in another physical page?
I feel this is a stronger reason?
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（4）
如果你考虑一下机器是如何接线的，这一切都是有道理的。
有时，人们尝试改变这一点（Rambus、FBDIMM），但我们不断地返回将 DRAM 阵列中的每个位连接到 CPU 总线上的相同位。
在计算机的早期阶段，在内存数据总线上移位以纠正未对齐的访问是相当昂贵的。有些机器不允许这一切；有些机器不允许这样做。那些确实增加了速度惩罚的人。有些，比如原来的，当时超快而且第一好——
64 位微 DEC-Alpha，实际上确实纠正了它，但代价是软件陷阱！
IA32 和 x64 架构始终透明地修复它，并且每个芯片上有无数晶体管，它们具有桶形移位器和其他专用硬件，可以轻松修补未对齐的参考。
但是，它仍然可能会中断管道，可能需要某种微陷阱；这不是“自然的方式”。
确切的惩罚取决于您所使用的芯片的微架构。可移植代码应该假设未对齐的访问会受到惩罚。一些嵌入式 CPU 芯片（一些 Arm）实际上不会出错，只是做了错误的事情！我真诚地希望所有这些都停产。
If you think about how the machine is wired, it all makes sense.
Occasionally, people have tried to change this (Rambus, FBDIMM) but we keep coming back to wiring each bit in the DRAM array to it's identical bit on the CPU bus.
In the earlier days of computers, it was quite expensive to shift bits on the memory data bus to correct for misaligned accesses. Some machines didn't allow it all; the ones that did added a speed penalty. Some, like the original, at-the-time-super-fast and first-good-
64-bit-micro DEC-Alpha, actually did correct it but at the expense of a software trap!
The IA32 and x64 architectures have always fixed it up transparently, and with zillions of transistors on each chip they have the barrel shifters and other dedicated hardware to easily patch up misaligned references.
But, it still may interrupt the pipeline, it may take some sort of micro-trap; it isn't the "natural way".
The exact penalty is specific to the microarchitecture of the chip you are using. Portable code should assume that misaligned accesses are penalized. Some embedded CPU chips (Some Arm) actually don't error out but just do the wrong thing! I'm sincerely hoping that all of those are out-of-production.
许多 32 位机器上的内存访问在 32 位边界上要快得多，要访问单个字节，机器必须读取 32 位（4 字节）段，然后单步执行
Memory access on many 32bit machines is much faster on 32bit boundaries, to access individual bytes the machine has to read a 32bit (4 byte) segment and then step into it
正如 Martin 所说，它更快……
而且一些 cpu 架构和一些 cpu 指令需要它 - 否则会崩溃。
例如，某些（？）ARM cpu 会因不对齐而出错。
例如，x86/x64 上的 MMX/SSE 需要 16 字节对齐。
as Martin says it is faster ...
... and also some cpu architectures and some cpu instructions require it - will crash otherwise.
eg, some(?) ARM cpus will fault on non alignment.
eg, MMX/SSE on x86/x64 require 16byte alignment.
我在某处读过相同的内容（无法回忆：如果我错了，请纠正我）并支持 Steel 的评论：
单词 ie 2 字节或 16x 数据通常用于涉及 mul / div / 有符号操作的数据操作...... x85 和 x86 黑白的主要区别
I had read the same somewhere(can't recollect : correct me if I am wrong) and supports steel`s comments:
The word i.e 2 bytes or 16x of data are generally used for those data operations which involved mul / div / signed operations...... major difference b/w x85 and x86