如何将变量值更改为目标?

发布于 2024-10-17 10:52:40 字数 464 浏览 4 评论 0原文

在这里,我再次遇到另一个 make 问题,我试图处理(几乎),我设置了几个我想要 make 读取的值,但是当我尝试在循环内进行更改时,它不起作用; $(FOUND) 剧照和第一张一样,我能做错什么吗?是否有其他方法来设置变量或将其更改为?

这是与这个问题相关的我的代码的一部分:

$(shell for d in $(INPUT); \
        do \
            $(if $(FOUND) -eq 1, REL=$(REL)../); \
            $(if $(findstring $(WORD),$(INPUT)), \
                echo '$(WORD)../'; FOUND=1)\
        done)

$(FOUND) 变量是在外部定义的,但希望它在获取 $(WORD) 时进行更改

对此有何建议???

太感谢了

here I am again with another make issue Im trying to handle (hardly), I have set several values I want make to read, but when I try to change inside a loop it does not work; $(FOUND) stills being the same as it was first, what could I being doing bad? is other way to set variables or to change them into?

here's a part of my code related to this question:

$(shell for d in $(INPUT); \
        do \
            $(if $(FOUND) -eq 1, REL=$(REL)../); \
            $(if $(findstring $(WORD),$(INPUT)), \
                echo '$(WORD)../'; FOUND=1)\
        done)

$(FOUND) variable is defined outside but want it to change when it gets $(WORD)

any suggestion for that???

thank you so much

如果你对这篇内容有疑问,欢迎到本站社区发帖提问 参与讨论,获取更多帮助,或者扫码二维码加入 Web 技术交流群。

扫码二维码加入Web技术交流群

发布评论

需要 登录 才能够评论, 你可以免费 注册 一个本站的账号。

评论(1

夜巴黎 2024-10-24 10:52:40

上面的代码有几个问题,以至于很难理解你的意图。这是部分列表(抱歉,如果我听起来像 Microsoft Clippy),

  • 代码 $(if $(FOUND) -eq 1, REL=$(REL)../) 看起来像是两者的混合gnu-make 语法和 shell 语法。
  • 你的循环似乎是多余的。您没有使用循环变量d,并且您正在使用处理整个序列的构造。例如: $(findstring $(WORD),$(INPUT)
  • 看来您正在尝试生成类似 echo '$(WORD)../' 的代码,但是这段代码的上下文不清楚。如果它在规则之外,则该代码没有意义。如果它在规则之内,那么设置 makefile 变量就太晚了。有一种方法可以解决这个问题。首先你需要更好地澄清你的意图,
  • 我只能怀疑你打算有 REL=$(REL)/..REL=../$(REL)但我可能会弄错。
  • 最后,重要的是要理解,在 Makefile 中真正应该做的是描述依赖关系图,并让 make 确定需要执行的操作顺序,因此可以推断出一种过程方法。上面的代码应该最小化。

编辑:

如果我没看错的话,你正试图在 Makefile 中实现一个棘手的目标。让我向你保证,你的经验不足并不是你唯一的绊脚石。编写好的 Makefile 很困难。如果您对此有任何控制权,我强烈建议您看看其他一些构建解决方案。例如,cmake可以为您编写好的Makefile。

如果您尝试计算基本目录或相对目录,请注意,保存在 $(CURDIR) 中的当前工作目录的概念可能是也可能不是您所期望的。

对于您的问题,您确实可以使用 GNU make $(foreach ...) 构造,但是有几个函数被设计为无需迭代即可处理序列,这可能会更好地为您服务。

There are several things wrong with the code above, so much so that it is difficult to understand your intention. Here is a partial list (sorry if I sound like Microsoft clippy)

  • The code $(if $(FOUND) -eq 1, REL=$(REL)../), looks like a mix between gnu-make syntax and shell syntax.
  • Your loop seems to be superfluous. You are not using the loop variable d, and you are using a construct that process the entire sequence. E.g.: $(findstring $(WORD),$(INPUT)
  • It seems that you are trying to generate code like echo '$(WORD)../', but the context of this code is unclear. If it is outside a rule, the code has no meaning. If it is inside a rule, it will evaluate too late to set a makefile variable. There is a way to work around this problem, but first you need to clarify your intention better.
  • I can only suspect you intended to have REL=$(REL)/.. or REL=../$(REL) but I can be mistaken.
  • Lastly it is important to understand that what you really should do in a Makefile is to describe a dependency graph, and let make figure out the order of operation needed to be performed. So a procedural approach such as may inferred from your code above should be minimized.

Edit:

If I read you correctly, you are trying to achieve a tricky goal in Makefile. Let me assure you that your inexperience is not the only stumbling block you have. Writing good Makefiles is hard. If you have any control over this, I strongly suggest to have a look at some other build solutions. For example, cmake can write good Makefiles for you.

If you are trying to calculate a base-dir or a relative-dir, please note that the concept of current-working-directory as saved in $(CURDIR) might or might not be what you expect.

For your question, you can indeed use a GNU make $(foreach ...) construct, but there are several functions that are designed to handle sequences without iterations, that might serve you better.

~没有更多了~
我们使用 Cookies 和其他技术来定制您的体验包括您的登录状态等。通过阅读我们的 隐私政策 了解更多相关信息。 单击 接受 或继续使用网站,即表示您同意使用 Cookies 和您的相关数据。
原文