简单的 Makefile 问题
我对汇编器做了一些更改（包括底层硬件也支持的新指令），我想在 code_asm 文件中使用这些更改。问题是，我现在的 Makefile 也使用 C 编译器来编译 code_asm 文件。 我想要做的是确保文件 code_asm1 和 code_asm2 运行通过 在生成的目标文件与应用程序的其余部分链接之前修改后的汇编程序。我尝试了一些东西，但没有成功，因此如果有一些 Makefile 经验的人能够快速帮助我，那就太好了。
CC = /mycom/bin/sparc-elf-gcc
AS = /myass/bin/sparc-elf-as
CFLAGS = -O2 -Wall -g
APP = test_V3
COBJ = file1.o \
file2.o \
file3.o
ASMOBJ_V3 = code_asm1.o \
code_asm2.o
all: $(APP)
# produce application
test_V3: $(ASMOBJ_V3) $(COBJ) Makefile
$(CC) $(EXTRAFLAGS) -o $@ $(COBJ) $(ASMOBJ_V3)
多谢， 克里斯
I made some changes to the Assembler (included new instructions that are also supported by the underlying hardware) which I wanna use in the code_asm files. The problem is, that the Makefile that I have at the moment uses the C Compiler to also compile the code_asm files.
What I wanna do is to make sure that the file code_asm1 and code_asm2 are run through
the modified assembler before the resulting object files are linked with the rest of the application. I tried some things but I am not succeeding hence it would be great if someone with some Makefile experience could quickly help me out.
CC = /mycom/bin/sparc-elf-gcc
AS = /myass/bin/sparc-elf-as
CFLAGS = -O2 -Wall -g
APP = test_V3
COBJ = file1.o \
file2.o \
file3.o
ASMOBJ_V3 = code_asm1.o \
code_asm2.o
all: $(APP)
# produce application
test_V3: $(ASMOBJ_V3) $(COBJ) Makefile
$(CC) $(EXTRAFLAGS) -o $@ $(COBJ) $(ASMOBJ_V3)
Thanks a lot,
Chris
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您需要指定汇编程序源的依赖关系，例如
（假设您的汇编程序源当然有
.asm后缀 - 如果是例如.S，请适当更改它）You need to specify dependencies for your assembler sources, e.g.
(assuming your assembler sources have a
.asmsuffix of course - change it appropriately if it's e.g..S)您需要覆盖标准规则来创建.o文件：
只需定义自己的规则来基于asm.c文件构建asm.o文件来替换上面的标准规则。
You need to overwrite the standard rule to create .o files:
Just define your own rule to build asm.o files based on asm.c files to replace the above standard rule.