mips 分支延迟时隙是否通过连续的分支传播?
我正在玩分支延迟槽。在 spim 上尝试过。
j some
j a
j b
j c
j d
ori $9, $0, 13
some:
a:
b:
c:
d:
令我惊讶的是,它把 9 美元变成了 13 美元。 所以我的问题是延迟槽是否可以传播,或者这是一个垃圾消息并且不会发生在真正的 mips32 处理器上? 如果这是预期的行为,有人可以给我一些关于那里发生的事情的启发吗?
I was playing around with branch delay slots. Tried that on spim.
j some
j a
j b
j c
j d
ori $9, $0, 13
some:
a:
b:
c:
d:
For my surprise it changed the $9 to 13.
So my question is can a delay slot propagate or this is a spim thing and doesn't happen on real mips32 processors?
If this is the expected behavior can someone give me a little enlightenment on what's happening there?
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Mips 指出,将分支指令放入分支延迟槽会导致未定义的结果。
Mips states that placing branch instruction in to a branch delay slot leads to undefined results.
作为免责声明,我从未使用过真正的 MIPS 机器,但我想对另一个分支使用分支延迟槽几乎肯定会导致问题。 MIPS 等处理器上的一种常见做法是使用分支延迟槽进行无操作,例如
ori $0, $0, 0
,只是为了确保不执行任何不应该执行的操作。As a disclaimer, I've never worked with a real MIPS machine, but I imagine that using a branch delay slot for another branch will almost certainly cause problems. One common practice on processors like MIPS is to use the branch delay slot for a no-op, such as
ori $0, $0, 0
, just to make sure that nothing executes that isn't supposed to.