递归 make 问：通用目标在其他目标之后？

发布于 2024-09-30 12:22:01 字数 987 浏览 0 评论 0原文

我知道递归 make 被认为是邪恶的，等等。无论如何，请耐心等待。

我们使用 GNU make 管理一个相对较大的项目，它大量使用 make include 来保持各个 make 文件的简单。我想添加一个在其他目标之后执行的目标。更准确地说，问题如下：

我有一个这样的 Makefile：

 PROJ_SRC = a.cpp b.cpp
 PROJ_LIB = ab

 PROJ_SUBDIRS  = x/ y/ z/
 PROJ_EXAMPLES = example/

我想首先在子目录 x、y、z 中调用 make，然后在 PWD 本身中构建库，然后才进入“示例”子目录使用该库构建示例。

除了示例之外的所有内容都工作正常，但我无法为最后一点提供干净的解决方案。以下是我尝试过的事情：

 # works ok for the target 'all', but nothing else
 all: subdirs ... $(PROJ_OBJ) $(PROJ_LIB_FULL) ... $(PROJ_EXAMPLES)

 # ugly, needs to be adde on all targets, and runs into examples 
 # repeatedly if multiple targets get invoked.
 full_lib:: $(PROJ_LIB_FULL)
 $(PROJ_LIB_FULL):: subdirs
   $(CXX) ...
 ifdef PROJ_EXAMPLES
   $(MAKE) -C $(PROJ_EXAMPLES)
 endif

 # this does not make sense, as it builds the lib even on 'make clean' etc
 $(PROJ_EXAMPLES):: full_lib

关于如何概括这一点有什么想法吗？

PS.：抱歉，如果上面的代码片段不是 100% 干净的语法 - 它们只是为了说明问题......

原文

I know that recursive make is deemed evil, etc. Please bear with me anyway.

We manage a relatively large project with GNU make, which heavily uses make includes to keep the individual make files simple. I'd like to add a target which gets executed after other targeted. More precisely, the problem is the following:

I have a Makefile like this:

 PROJ_SRC = a.cpp b.cpp
 PROJ_LIB = ab

 PROJ_SUBDIRS  = x/ y/ z/
 PROJ_EXAMPLES = example/

I would like to first call make in the subdirs x,y,z, then build the lib in PWD itself, and only then go into the 'example' subdir to build the examples using that lib.

Everything but the example bit is working fine, but I cannot wrap my head around a clean solution for that last bit. Here are the things I tried:

 # works ok for the target 'all', but nothing else
 all: subdirs ... $(PROJ_OBJ) $(PROJ_LIB_FULL) ... $(PROJ_EXAMPLES)

 # ugly, needs to be adde on all targets, and runs into examples 
 # repeatedly if multiple targets get invoked.
 full_lib:: $(PROJ_LIB_FULL)
 $(PROJ_LIB_FULL):: subdirs
   $(CXX) ...
 ifdef PROJ_EXAMPLES
   $(MAKE) -C $(PROJ_EXAMPLES)
 endif

 # this does not make sense, as it builds the lib even on 'make clean' etc
 $(PROJ_EXAMPLES):: full_lib

Any idea on how to generalize that?

PS.: sorry if the above snippets are not 100% clean syntax - they are just supposed to illustrate the problem...

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一束光，穿透我孤独的魂 2024-10-07 12:22:01

有一个用于“创建”目录的高级技巧，例如，您不必在子目录中运行不必要的 Make。但即使没有这个，你也可以获得一个非常干净的解决方案：

$(PROJ_LIB): $(PROJ_SUBDIRS)
  $(CXX) ...

$(PROJ_EXAMPLES): $(PROJ_LIB)
  $(MAKE) -C $@

.PHONY: clean
clean: TARG=clean
clean: $(PROJ_SUBDIRS)
  $(MAKE) -C $(PROJ_EXAMPLES) $@

.PHONY: $(PROJ_SUBDIRS)
$(PROJ_SUBDIRS):
  $(MAKE) -C $@ $(TARG)

如果你不喜欢在清理时避免构建库的技巧，你总是可以让 example/ makedir 成为需要的那个图书馆大楼。毕竟，该依赖项确实属于 example。

编辑：

如果您愿意让 example/Makefile 处理 lib 依赖项，这会简化事情。您可以非常整齐地包装递归目标：

$(PROJ_LIB): $(PROJ_SUBDIRS)
  $(CXX) ...

RECURSIVES = clean distclean veryclean squeakyclean
.PHONY: $(RECURSIVES)

$(RECURSIVES): TARG=$@

ALL_SUBDIRS = $(PROJ_SUBDIRS) $(PROJ_EXAMPLES)

# Maybe you want them all to recurse into the same directories:
$(RECURSIVES): $(ALL_SUBDIRS)

#...or maybe not:
clean veryclean squeakyclean: $(ALL_SUBDIRS)
distclean: $(PROJ_EXAMPLES)

# This part does the recursion:
.PHONY: $(ALL_SUBDIRS)
$(ALL_SUBDIRS)
  $(MAKE) -C $@ $(TARG)

# And you still have to define the top-level rules:

clean:
  rm ...

# Maybe nothing to do at this level for distclean

veryclean:
  rm ... and ...

squeakyclean:
  rm *

There is an advanced trick for "making" a directory, so that, for instance, you won't have to run Make unnecessarily in the subdirectories. But even without that you can get a pretty clean solution:

$(PROJ_LIB): $(PROJ_SUBDIRS)
  $(CXX) ...

$(PROJ_EXAMPLES): $(PROJ_LIB)
  $(MAKE) -C $@

.PHONY: clean
clean: TARG=clean
clean: $(PROJ_SUBDIRS)
  $(MAKE) -C $(PROJ_EXAMPLES) $@

.PHONY: $(PROJ_SUBDIRS)
$(PROJ_SUBDIRS):
  $(MAKE) -C $@ $(TARG)

And if you don't like that trick for avoiding building the library when cleaning, you could always have the example/ makedir be the one that calls for the building of the library. After all, that dependency really belongs to example.

EDIT:

If you're willing to let example/Makefile handle the lib dependency, that simplifies things. You can wrap up the recursive targets pretty neatly:

$(PROJ_LIB): $(PROJ_SUBDIRS)
  $(CXX) ...

RECURSIVES = clean distclean veryclean squeakyclean
.PHONY: $(RECURSIVES)

$(RECURSIVES): TARG=$@

ALL_SUBDIRS = $(PROJ_SUBDIRS) $(PROJ_EXAMPLES)

# Maybe you want them all to recurse into the same directories:
$(RECURSIVES): $(ALL_SUBDIRS)

#...or maybe not:
clean veryclean squeakyclean: $(ALL_SUBDIRS)
distclean: $(PROJ_EXAMPLES)

# This part does the recursion:
.PHONY: $(ALL_SUBDIRS)
$(ALL_SUBDIRS)
  $(MAKE) -C $@ $(TARG)

# And you still have to define the top-level rules:

clean:
  rm ...

# Maybe nothing to do at this level for distclean

veryclean:
  rm ... and ...

squeakyclean:
  rm *

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