当变量定义有尾随空格时如何阻止 GNU Make 执行
我的 makefile 中有一个简单的变量定义:
THIS := ~/edan
并且该行中有尾随空格。
后来,当我根据这个变量定义另一个变量时:
WARES := $(THIS)/wares
定义的实际变量是 /home/directory/edanwares
然后删除 make clean
规则 / home/directory/edan
而不是我想要的。
如果一行有尾随空格,如何阻止 makefile 执行?
I had a simple variable definition in my makefile:
THIS := ~/edan
and it had trailing spaces in the line.
Later, when I defined another variable in terms of this one:
WARES := $(THIS)/wares
the actual variable defined was /home/directory/edan wares
and then the make clean
rule removed /home/directory/edan
instead of what I wanted it to.
How can I prevent a makefile from executing if a line has trailing spaces?
如果你对这篇内容有疑问,欢迎到本站社区发帖提问 参与讨论,获取更多帮助,或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱,如果其他用户或者作者回复了您的评论,将不能在第一时间通知您!
发布评论
评论(1)
尽管您可以编写 Makefile,以便它检查变量是否有尾随空格,如果找到则退出,但有更好的方法来处理这种情况。
在这种情况下,我建议使用
addsuffix
函数来连接$(THIS)
和/wares
而不是手动执行。addsuffix
函数将为您去除尾随空格。换句话说:如果您确实希望它在发现尾随空格时退出,您可以这样做:
Although you could write the Makefile so that it checks the variable for trailing whitespace and exits if it finds some, there are better ways of dealing with this situation.
In this instance, I would recommend using the
addsuffix
function to catenate$(THIS)
and/wares
instead of doing it manually. Theaddsuffix
function will strip the trailing whitespace for you. In other words:If you really want it to exit if it discovers trailing whitespace, you could do this: