为 ARM NEON 进行编译时出现未知的 GCC 错误(严重)
我有一个基于 ARM NEON Cortex-A8 的处理器目标。我正在通过使用 NEON 来优化我的代码。但是当我编译代码时,我收到这个奇怪的错误。不知道如何解决这个问题。
我正在尝试在我的主机上使用 Code Sourcery (PART2) 编译以下代码 (PART 1)。 我收到这个奇怪的错误(第 3 部分)。我在这里做错了什么吗?其他人可以编译这个并看看他们是否也得到相同的编译错误吗?
奇怪的是,在代码中,如果我注释掉代码的 else if(step_size == 4) 部分,那么错误就会消失。但是,遗憾的是,如果没有它,我的优化就不完整,所以我必须拥有它。
起初我以为是CodeSourcey编译器(在我的主机上)的问题,所以我直接在我的目标上编译了程序(我的目标在Ubuntu上运行)。我在那里使用了 gcc,再次遇到相同的错误,当我注释掉 else if(step_size == 4) 部分时,错误消失了。
帮助!
第 1 部分
#include<stdio.h>
#include"arm_neon.h"
#define IMAGE_HEIGHT 480
#define IMAGE_WIDTH 640
float32_t integral_image[IMAGE_HEIGHT][IMAGE_WIDTH];
float32x4_t box_area_compute3(int, int , int , int , unsigned int , float);
inline int min(int, int);
int main()
{
box_area_compute3(1, 1, 4, 4, 2, 0);
return 0;
}
float32x4_t box_area_compute3(int row, int col, int num_rows, int num_cols, unsigned int step_size, float three)
{
unsigned int height = IMAGE_HEIGHT;
unsigned int width = IMAGE_WIDTH;
int temp_row = row + num_rows;
int temp_col = col + num_cols;
int r1 = (min(row, height))- 1 ;
int r2 = (min(temp_row, height)) - 1;
int c1 = (min(col, width)) - 1;
int c2 = (min(temp_col, width)) - 1;
float32x4_t v128_areas;
if(step_size == 2)
{
float32x4x2_t top_left, top_right, bottom_left, bottom_right;
top_left = vld2q_f32((float32_t *)integral_image[r1] + c1);
top_right = vld2q_f32((float32_t *)integral_image[r1] + c2);
bottom_left = vld2q_f32((float32_t *)integral_image[r2] + c1);
bottom_right = vld2q_f32((float32_t *)integral_image[r2] + c2);
v128_areas = vsubq_f32(vsubq_f32(vaddq_f32(top_left.val[0], bottom_right.val[0]), top_right.val[0]), bottom_left.val[0]);
}
else if(step_size == 4)
{
float32x4x4_t top_left, top_right, bottom_left, bottom_right;
top_left = vld4q_f32((float32_t *)integral_image[r1] + c1);
top_right = vld4q_f32((float32_t *)integral_image[r1] + c2);
bottom_left = vld4q_f32((float32_t *)integral_image[r2] + c1);
bottom_right = vld4q_f32((float32_t *)integral_image[r2] + c2);
v128_areas = vsubq_f32(vsubq_f32(vaddq_f32(top_left.val[0], bottom_right.val[0]), top_right.val[0]), bottom_left.val[0]);
}
if(three == 3.0)
v128_areas = vmulq_n_f32(v128_areas, three);
return v128_areas;
}
inline int min(int X, int Y)
{
return (X < Y ? X : Y);
}
第 2 部分
arm-none-linux-gnueabi-gcc -O0 -g3 -Wall -c -fmessage-length=0 -fcommon -MMD -MP -MF"main.d" -MT"main.d" -mcpu=cortex-a8 -marm -mfloat-abi=hard -mfpu=neon-vfpv4 -o"main.o" "../main.c"
第 3 部分
../main.c: In function 'box_area_compute3':
../main.c:65: error: unable to find a register to spill in class 'GENERAL_REGS'
../main.c:65: error: this is the insn:
(insn 226 225 227 5 c:\program files\codesourcery\sourcery g++\bin\../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/arm_neon.h:9863 (parallel [
(set (reg:XI 148 [ D.17028 ])
(unspec:XI [
(mem:XI (reg:SI 3 r3 [301]) [0 S64 A64])
(reg:XI 148 [ D.17028 ])
(unspec:V4SF [
(const_int 0 [0x0])
] 191)
] 111))
(set (reg:SI 3 r3 [301])
(plus:SI (reg:SI 3 r3 [301])
(const_int 32 [0x20])))
]) 1605 {neon_vld4qav4sf} (nil))
../main.c:65: confused by earlier errors, bailing out
cs-make: *** [main.o] Error 1
I have a ARM NEON Cortex-A8 based processor target. I was optimizing my code by making use of NEON. But when I compile my code I get this strange error. Don't know how to fix this.
I'm trying to compile the following code (PART 1) using Code Sourcery (PART2) on my host.
And I get this strange error (PART3). Am I doing something wrong here? Can anyone else compile this and see if they also get the same compilation error?
The strange part is, in the code if I comment out the else if(step_size == 4)
part of the code, then the error vanishes. But, sadly my optimization is not complete with out it, so I must have it.
At first I thought its the problem with CodeSourcey compiler (on my host), so I compiled the program on my target directly (My target runs on Ubuntu). I used gcc there and once again, I get the same error and when I comment out the else if(step_size == 4)
part, then the error vanishes.
Help!
PART 1
#include<stdio.h>
#include"arm_neon.h"
#define IMAGE_HEIGHT 480
#define IMAGE_WIDTH 640
float32_t integral_image[IMAGE_HEIGHT][IMAGE_WIDTH];
float32x4_t box_area_compute3(int, int , int , int , unsigned int , float);
inline int min(int, int);
int main()
{
box_area_compute3(1, 1, 4, 4, 2, 0);
return 0;
}
float32x4_t box_area_compute3(int row, int col, int num_rows, int num_cols, unsigned int step_size, float three)
{
unsigned int height = IMAGE_HEIGHT;
unsigned int width = IMAGE_WIDTH;
int temp_row = row + num_rows;
int temp_col = col + num_cols;
int r1 = (min(row, height))- 1 ;
int r2 = (min(temp_row, height)) - 1;
int c1 = (min(col, width)) - 1;
int c2 = (min(temp_col, width)) - 1;
float32x4_t v128_areas;
if(step_size == 2)
{
float32x4x2_t top_left, top_right, bottom_left, bottom_right;
top_left = vld2q_f32((float32_t *)integral_image[r1] + c1);
top_right = vld2q_f32((float32_t *)integral_image[r1] + c2);
bottom_left = vld2q_f32((float32_t *)integral_image[r2] + c1);
bottom_right = vld2q_f32((float32_t *)integral_image[r2] + c2);
v128_areas = vsubq_f32(vsubq_f32(vaddq_f32(top_left.val[0], bottom_right.val[0]), top_right.val[0]), bottom_left.val[0]);
}
else if(step_size == 4)
{
float32x4x4_t top_left, top_right, bottom_left, bottom_right;
top_left = vld4q_f32((float32_t *)integral_image[r1] + c1);
top_right = vld4q_f32((float32_t *)integral_image[r1] + c2);
bottom_left = vld4q_f32((float32_t *)integral_image[r2] + c1);
bottom_right = vld4q_f32((float32_t *)integral_image[r2] + c2);
v128_areas = vsubq_f32(vsubq_f32(vaddq_f32(top_left.val[0], bottom_right.val[0]), top_right.val[0]), bottom_left.val[0]);
}
if(three == 3.0)
v128_areas = vmulq_n_f32(v128_areas, three);
return v128_areas;
}
inline int min(int X, int Y)
{
return (X < Y ? X : Y);
}
PART 2
arm-none-linux-gnueabi-gcc -O0 -g3 -Wall -c -fmessage-length=0 -fcommon -MMD -MP -MF"main.d" -MT"main.d" -mcpu=cortex-a8 -marm -mfloat-abi=hard -mfpu=neon-vfpv4 -o"main.o" "../main.c"
PART 3
../main.c: In function 'box_area_compute3':
../main.c:65: error: unable to find a register to spill in class 'GENERAL_REGS'
../main.c:65: error: this is the insn:
(insn 226 225 227 5 c:\program files\codesourcery\sourcery g++\bin\../lib/gcc/arm-none-linux-gnueabi/4.4.1/include/arm_neon.h:9863 (parallel [
(set (reg:XI 148 [ D.17028 ])
(unspec:XI [
(mem:XI (reg:SI 3 r3 [301]) [0 S64 A64])
(reg:XI 148 [ D.17028 ])
(unspec:V4SF [
(const_int 0 [0x0])
] 191)
] 111))
(set (reg:SI 3 r3 [301])
(plus:SI (reg:SI 3 r3 [301])
(const_int 32 [0x20])))
]) 1605 {neon_vld4qav4sf} (nil))
../main.c:65: confused by earlier errors, bailing out
cs-make: *** [main.o] Error 1
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我无法对此进行测试,因为我没有相应的工具链,但通常可以通过稍微改写代码来解决这种类型的错误。一般来说,这种情况不应该发生,并且应该将其报告为错误,但是您正在使用处理器特定的功能,该功能可能没有像编译器的其余部分那样经过良好的测试和完善。
由于这是一个寄存器溢出错误,并且涉及多个指针,因此我高度怀疑编译器可能会尝试将更多数据加载到寄存器中,因为担心可能会发生一些别名(这可能不是'实际上没有发生)。下面我将处理这种可能性,并做一些其他事情,这些事情可能会从编译器的角度降低代码的复杂性(尽管看起来可能并非如此)。
我希望这对您有所帮助,并且我没有引入任何错误。
I can't test this because I don't have the toolchain for it, but this type of error can often be worked around by rewording the code a little bit. Generally this shouldn't happen, and it should be reported as a bug, but you are using processor specific functionality, which is probably less well tested and polished than the rest of the compiler.
Since it is a register spill error and you've got several pointers involved I highly suspect that the compiler may be trying to load more data into registers than it needs to out of fear that there may be some aliasing going on (which probably isn't actually happening). Below I will deal with the possibility of that as well as do a few other things which may lessen the complexity of the code from the compiler's perspective (though it might not look like this is the case).
I hope that this helps and that I did not introduce any errors.
我已经就这个问题联系了 Code Sourcery,他们认为这是 GCC 编译器中的一个错误。所以我在汇编中编写了 do_it4(){.....} 函数,而不是使用内部函数。现在效果很好!
Well I had contacted the Code Sourcery about this problem and they have considered this as a bug in GCC compiler. So I wrote the do_it4(){.....} function in assembly instead of using teh intrinsics. Now it works good!
该行:
使用所有 16 个 q 寄存器!编译器无法处理这个问题并不奇怪。您可能可以通过重写以使用更少的寄存器来解决此问题。
The line:
uses all 16 q registers! It's not too surprising that the compiler can't handle this. You probably could have fixed this by re-writing to use fewer registers.
ARM NEON Cortex-A8 有 vfpv3 支持,Cortex-A5 有 vfpv4 和 neon2 支持,(例如:如果您使用 -mfloat-abi=hard 您会跳过在软件中模拟缺少指令的能力,因此您无法生成可优化的代码适用于 vfpv4,但可以通过软件模拟在 vfpv3 上运行)
ARM NEON Cortex-A8 have vfpv3 support, Cortex-A5 have vfpv4 and neon2 support, (as for: if you use -mfloat-abi=hard you skip ability to emulate in software missing instructions, so you cannot generate code which would be optimised for vfpv4 but would run on vfpv3 with software emulation)