模型源代码
以下是一些 modelsim 代码:
begin
tb_in_top = 0;
#5 tb_in_top = 4'b0000;#5 tb_in_top = 4'b0001;
#5 tb_in_top = 4'b0010;#5 tb_in_top = 4'b0011;
#5 tb_in_top = 4'b0100;#5 tb_in_top = 4'b0101;
#5 tb_in_top = 4'b0110;#5 tb_in_top = 4'b0111;
#5 tb_in_top = 4'b1000;#5 tb_in_top = 4'b1001;
#5 tb_in_top = 4'b1010;#5 tb_in_top = 4'b1011;
#5 tb_in_top = 4'b1100;#5 tb_in_top = 4'b1101;
#5 tb_in_top = 4'b1110;#5 tb_in_top = 4'b1111;
#100 $finish;
end
#5 和 #100 代表什么?这些是行号吗?这段代码有问题吗?
The following is some modelsim code:
begin
tb_in_top = 0;
#5 tb_in_top = 4'b0000;#5 tb_in_top = 4'b0001;
#5 tb_in_top = 4'b0010;#5 tb_in_top = 4'b0011;
#5 tb_in_top = 4'b0100;#5 tb_in_top = 4'b0101;
#5 tb_in_top = 4'b0110;#5 tb_in_top = 4'b0111;
#5 tb_in_top = 4'b1000;#5 tb_in_top = 4'b1001;
#5 tb_in_top = 4'b1010;#5 tb_in_top = 4'b1011;
#5 tb_in_top = 4'b1100;#5 tb_in_top = 4'b1101;
#5 tb_in_top = 4'b1110;#5 tb_in_top = 4'b1111;
#100 $finish;
end
What does the #5 and #100 represent? Are those line numbers? Is there something wrong with this code?
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它不是“ModelSim”代码,就像“Visual Studio”代码一样。它是Verilog。
#
标记表示以纳秒为单位的延迟。所以这段代码的意思是:
(...继续向上计数,每 5 ns 将 tb_in_top 加 1 ...)
是的,Verilog 有
for
循环,是的,这应该是一个。附录
for
循环如下所示:最后,请注意,使用
#
延时操作的 Verilog 无法综合为逻辑;它只能用于模拟。It's not "ModelSim" code any more than something is "Visual Studio" code. It's Verilog.
The
#
token signifies a delay in nanoseconds.So what this code means is:
(... keep counting up, incrementing tb_in_top by 1 every 5 ns ...)
Yes, Verilog has
for
loops, and yes, that should be one.Addendum
The
for
loop would look like:Finally, note that Verilog that uses the
#
time-delay operation cannot be synthesized to logic; it can only be used for simulation.