Make:根据目标设置变量

发布于 2024-09-17 05:45:21 字数 615 浏览 5 评论 0原文

我想根据指定的目标设置一个变量。 例如:

if target == filename_a then
  VAR1 = YES
if target == filename_b then
  VAR2 = YES

显然,这是伪代码,而不是正确的 make 语法。

我真正想做的是根据目标包含不同的 make 文件和包含目录。一些目标共享相同的设置,因此在一个 makefile 中维护起来更容易。

稍后将使用它的示例:

ifeq ($(VAR1), YES)
  include foo.mk
endif
ifeq ($(VAR2), YES)
  include baz.mk
endif

不幸的是,不能使用以下语法:

target : VAR1 = YES

因为据我所知,此变量分配仅在实际构建目标的过程中有效。

目标环境是Solaris下的ClearMake 7,因此请避免任何GNU Make特定的解决方案。

谢谢


编辑: 据我所知,make 无法以在处理步骤中目标可用的方式工作。因此,所要求的功能很可能确实存在。

I want to set a variable depending on the assigned target.
For instance:

if target == filename_a then
  VAR1 = YES
if target == filename_b then
  VAR2 = YES

Obviously, this is pseudo-code and not proper make-syntax.

What I really want to do is to include different make-files and include-directories dependent on target. Some targets share the same settings, and hence it is easier to maintain in one makefile.

An example of what it will be used for later:

ifeq ($(VAR1), YES)
  include foo.mk
endif
ifeq ($(VAR2), YES)
  include baz.mk
endif

Unfortunantly the following syntax cannot be used:

target : VAR1 = YES

Since this variable assignment is only valid through the process of actually building target, as I understand it.

The target environment is ClearMake 7 under Solaris, so please avoid any GNU Make specific solutions.

Thanks


Edit:
As far as I can tell, make does not work in a way where the target is available during the processing step. Hence the feature asked for does most likely exist.

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殤城〤 2024-09-24 05:45:21

如果这能起作用,我会感到惊讶,因为据我了解,Make 流程在知道需要制定什么目标之前包含语句。但我对 ClearMake 一无所知,而且我也不是真正的专家,所以希望有人证明我错了......

I'd be surprised if this can work, since as I understand it, Make processes include statements before it knows what targets it needs to make. But I know nothing about ClearMake and I'm not really an expert, so hopefully someone proves me wrong...

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