轮询硬件按钮的状态
我需要为在 200mhz MIPS cpu 上运行 embedde linux 的设备实现以下功能： 1) 如果按下重置按钮并保持时间少于一秒 - 继续重新启动 2) 如果按下重置按钮并保持至少 3 秒。 - 使用 NVRAM 中的默认值恢复系统配置，然后重新启动。
我正在考虑两种方法： 1) 一个守护进程，通过 GPIO ioctl 以正确的时序不断轮询按钮的状态 （可能开销太大，大量上下文切换？） 2) 简单的字符驱动程序轮询按钮、测量计时并报告状态，例如，通过 /proc 到用户空间，守护进程或 shell 脚本可以在其中检查并执行所需的操作。
对于这两种情况，我不知道如何测量时间:( 你有什么建议/推荐？
I need to implement the following feature for my device running embedde linux on a 200mhz MIPS cpu:
1) if a reset button is pressed and held for less then a second - proceed with reboot
2) if a reset button is pressed and held for at least 3 sec. - restore the system's configuration with default values from NVRAM and then reboot.
I'm thinking of two ways:
1) a daemon that constantly polls the button's state with proper timings via GPIO ioctls
(likely too big overhead, lots of context switching ?)
2) simple char driver polling the button, measuring timings and reporting the state, for example, via /proc to user space where daemon or a shell script can check and do what's required.
And for both cases I have no idea how to measure the time :(
What would you suggest/recommend?
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我不熟悉 MIPS 处理器和您可能使用的引脚的 GPIO/中断功能，但可能的方法如下。
如果引脚无法提供中断，则步骤 1 将是轮询任务以查看输入。
按下去抖动按钮后，按下重置按钮和运行完全重置过程之间的时间始终为 3 秒。在重置情况下，这可能并不重要，特别是如果作为步骤 3 的一部分，您让用户明显看到重置序列已开始 - 例如使显示屏空白。
I am not familiar with the MIPS processor and the GPIO/interrupt capabilities of the pin that you could be using but a possible methodology could be as follows.
If the pin cannot provide an interrupt then step 1 will be a polling task to look at the input.
The time between the reset button being pressed and the full reset process being run will always be 3 seconds from a debounced button press. In a reset situation this may not be important particularly if as part of step 3 you make it apparent to the user that a reset sequence has started - blank the display for example.
如果您想在软件中执行此操作，则需要将其放入内核（中断）代码中，而不是放入 shell 脚本或守护程序中。更好的方法是将其放入硬件中。
根据我的经验，重置设备的可能原因是错误的用户代码锁定或破坏了处理器。如果问题是由于射频能量或类似性质的原因导致内存损坏，您可能需要硬件或外部（强化）处理器来重新刷新设备并解决问题。
在用户代码错误的情况下，处理器中断和内核代码应继续运行，而用户代码可能完全停止。如果您可以从中断中轮询引脚，那么您就有更好的机会真正获得预期的复位。此外，这使您能够进行事件驱动编程，而不是不断轮询引脚。
另一种方法（不是您列出的规格，而是实现相同目标的一种流行方法）是让启动例程检查 GPIO 线，并在您想要重新初始化设备时按住按钮。在我见过的大多数嵌入式 Linux 设备上，“重置”按钮连接到微控制器上的专用重置引脚，而不是连接到 GPIO 引脚。你可能必须走这条路，除非你想开始切割痕迹。
If you want to do this in software, you need to put this in kernel (interrupt) code, rather than in a shell script or daemon. The better approach would be to put this in hardware.
In my experience, the likely reason for resetting the device will be bad user code which has locked or bricked the processor. If the issue is a corruption of memory due to RF energy or something of that nature, you may require hardware or an external (hardened) processor to reflash the device and fix the problem.
In the bad-user-code case, processor interrupts and kernel code should continue to run, while user code may be completely stalled. If you can poll the pin from an interrupt, you stand a much better chance of actually getting the reset you expect. Also, this enables you to do event-driven programming, rather than constantly polling the pin.
One other approach (not to the specs you listed, but a popular method for achieving the same goal) would be to have the startup routines check a GPIO line, and hold a button down when you want to re-initialize the device. On most embedded Linux devices which I've seen, the "Reset" button is wired to a dedicated reset pin on the microcontroller, and not to a GPIO pin. You may have to go with this route, unless you want to start cutting traces.
您必须在硬件中实现这些。 “从 NVRAM 恢复默认值”的目的是恢复所谓的“变砖”设备。
例如，如果 NVRAM 设置被修改（宇宙射线？）导致设备无法启动怎么办？在这种情况下，您建议的按钮轮询守护进程将永远不会执行。
对于一秒保持重启，请使用 RC（电阻器 + 电容器）电路来“消除”按钮按下的抖动。选择适合一秒延迟的 RC 时间常数。使用比较器观察 RC 电压，向 MIPS cpu 上的
RESET引脚发出信号。对于三秒按下功能（恢复 NVRAM 默认值），您可能必须做一些更复杂的事情。
一种可能性是将微型 PIC 微控制器放入复位电路，但仅使用具有熔丝（不可擦除）ROM 的微控制器，而不使用 NVRAM。
一种更简单的可能性是让 ROM 包含与 NVRAM 相同的电路和总线上的默认值。 AJ/K 触发器锁存器可以成为复位电路的一部分。您还需要一个三秒调谐 RC 电路和比较器。在不到三秒的按下过程中，触发器应锁存
0输出，而在三秒以上的按下过程中，第二个 RC 电路应在 3 秒后触发比较器并呈现1到 J/K 锁存器，这将切换其输出。触发器输出
Q将存储单个位，告诉您的电路此复位周期是否是在三秒推动之后。如果是，则输出Q将片选驱动至 NVRAM，而Q*将片选驱动至 ROM。 （我假设 NVRAM 和 ROM 芯片上的片选都是负逻辑。）然后，当 CPU 启动时，它将根据片选线从 NVRAM 或 ROM 获取设置。
您的启动代码可以检测到它是通过 ROM 片选启动的，并且稍后可以使用 GPIO 线重置 J/K 触发器。然后 CPU 将能够将正确的值写回 NVRAM。希望这能解锁设备。
您想要使用不可擦除或不可重复使用的 ROM。这种ROM最能抵抗静电、电源故障和辐射。辐射的存在比我们通常意识到的要多得多，例如，在客机上安装设备会使宇宙射线通量成倍增加。
You have to implement those in hardware. The purpose of the "restore defaults from NVRAM" is to restore a so-called "bricked" device.
For example, what if an NVRAM seting is modified (cosmic ray?) such that the device cannot boot? In that case, your proposed button-polling daemon will never execute.
For the one-second held reboot, use an RC (resistor + capacitor) circuit to "debounce" the button press. Select an RC time constant which is appropriate for the one second delay. Use a comparator watching the RC voltage to signal the
RESETpin on the MIPS cpu.For the three-second press functionality (restore NVRAM defaults), you have to do something more complicated, probably.
One possibility is to put a tiny PIC microcontroller into the reset circuit, but only use a microcontroller with fuse (non-erasable) ROM, not NVRAM.
An easier possibility is to have a ROM containing defaults on the same circuit and bus as the NVRAM. A J/K flip-flop latch can become part of your reset circuitry. You'll also need a three-second-tuned RC circuit and comparator. On sub-three-second presses, the flip-flop should latch a
0output and on three-second-plus presses, the 2nd RC circuit should trigger the comparator after 3 seconds and present a1to the J/K latch, which will toggle its output.The flip-flop output
Qwill store the single bit telling your circuit whether this reset cycle was subsequent to a three-second push. If so, that outputQis driving the chip select to the NVRAM andQ*is driving the chip select to ROM. (I assume chip select is negative logic on both NVRAM and ROM chips.)Then when your CPU boots, it will fetch the settings from either the NVRAM or the ROM, depending on the chip select line.
Your boot code can detect that it booted with ROM chip select, and can later reset the J/K flip-flop with a GPIO line. Then the CPU will be able to write good values back into the NVRAM. That unbricks the device, hopefully.
You want to use ROM that is not erasable or reusable. That kind of ROM is the most resistant to static electricity, power supply trouble, and radiation. Radiation is much more present than we generally realize, and the amount of cosmic ray flux is multiplied by taking a device onboard an airliner, for example.