ARMv6 FIQ，确认中断
我正在使用 i.mx35 armv6 核心处理器。我已将中断 62 配置为 FIQ，并安装并调用了我的处理程序。我的处理程序目前只是切换输出引脚，这样我就可以用示波器测试延迟。使用下面的代码，一旦我触发 FIQ，它就会尽可能快地永远持续下去，显然没有被确认。我通过中断强制寄存器触发 FIQ，因此我确信源不会这么快触发它。如果我在 FIQ 例程中禁用 AVIC 中的中断 62，则中断只会触发一次。
我已阅读 ARM1136JF-S 和 ARM1136J-S 技术参考手册中有关 VIC 端口的部分，其中涵盖了正确的退出过程。我只有一个 FIQ 处理程序，因此不需要分支。我不明白的一行是：
STR R0, [R8,#AckFinished]
我不确定 AckFinished 应该是什么或者这个命令应该做什么。
我的 FIQ 处理程序如下：
ldr r9, IOMUX_ADDR12
ldr r8, [r9]
orr r8, #0x08 @ top LED
str r8,[r9] @turn on LED
bic r8, #0x08 @ top LED
str r8,[r9] @turn off LED
subs pc, r14, #4
IOMUX_ADDR12: .word 0xFC2A4000 @remapped IOMUX addr
如果我在第一次执行后禁用它，我的处理程序会正常返回并且正常系统操作会恢复，否则它会不断触发并且系统似乎挂起。
您认为我的假设是否正确，即核心不承认 AVIC，或者是否还有其他原因导致 FIQ 触发？如果核心不承认 AVIC，我需要做什么才能承认它？
I'm working with an i.mx35 armv6 core processor. I have Interrupt 62 configured as a FIQ with my handler installed and being called. My handler at the moment just toggles an output pin so I can test latency with a scope. With the code below, once I trigger the FIQ it continues forever as fast as it can, apparently not being acknowledged. I'm triggering the FIQ by means of the Interrupt Force Register so I'm assured that the source isn't triggering it this fast. If I disable Interrupt 62 in the AVIC in my FIQ routine the interrupt only triggers once.
I have read the sections on the VIC Port in the ARM1136JF-S and ARM1136J-S Technical Reference Manual and it covers proper exit procedure. I'm only having one FIQ handler so I have no need to branch. The line that I don't understand is:
STR R0, [R8,#AckFinished]
I'm not sure what AckFinished is supposed to be or what this command is supposed to do.
My FIQ handler is below:
ldr r9, IOMUX_ADDR12
ldr r8, [r9]
orr r8, #0x08 @ top LED
str r8,[r9] @turn on LED
bic r8, #0x08 @ top LED
str r8,[r9] @turn off LED
subs pc, r14, #4
IOMUX_ADDR12: .word 0xFC2A4000 @remapped IOMUX addr
My handler returns just fine and normal system operation resumes if I disable it after the first go, otherwise it triggers constantly and the system appears to hang.
Do you think my assumption is right that the core isn't acknowledging the AVIC or could there be another cause of this FIQ triggering? If the core isn't acknowledging the AVIC, what do I need to do to acknowledge it?
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正如您所说，您似乎没有从生成中断的外设或 VIC 本身之一或两者中清除挂起的中断。
It's just as you say, it looks like you're not clearing the pending interrupt from one or both of the peripheral generating the interrupt or the VIC itself.