“内存是8字节对齐的”是什么意思？
在进行一个项目时，我发现内存数据是“8 字节对齐”的。谁能解释一下这是什么意思吗？
While going through one project, I have seen that the memory data is "8 bytes aligned". Can anyone please explain what this means?
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（4）
“8 字节对齐”的对象存储在 8 的倍数的内存地址中。
许多 CPU 只会从对齐的位置加载某些数据类型；在其他 CPU 上，这种访问速度更快。使用内存对齐还有其他几个可能的原因 - 如果没有看到代码，很难说出原因。
对齐访问速度更快，因为到内存的外部总线不是单字节宽，通常是 4 或 8 字节宽（甚至更宽）。这意味着 CPU 不会一次获取单个字节 - 它会从请求的地址开始获取 4 或 8 个字节。因此，存储器地址的 2 或 3 个最低有效位实际上并不是由 CPU 发送的 - 外部存储器只能在总线宽度倍数的地址处读取或写入。如果您在地址“9”处请求一个字节，CPU 实际上会向内存请求从地址 8 开始的字节块，并将第二个字节加载到您的寄存器中（丢弃其他字节）。
这意味着未对齐的访问可能需要从内存中读取两次：如果您请求从地址 9 开始的 8 个字节，CPU 必须获取从地址 8 开始的 8 个字节以及从地址16，然后屏蔽掉你想要的字节。另一方面，如果您请求从地址 8 开始的 8 个字节，则只需要一次读取。有些 CPU 甚至不会执行这种未对齐的加载 - 它们只会引发异常（甚至默默地加载错误的数据！）。
An object that is "8 bytes aligned" is stored at a memory address that is a multiple of 8.
Many CPUs will only load some data types from aligned locations; on other CPUs such access is just faster. There's also several other possible reasons for using memory alignment - without seeing the code it's hard to say why.
Aligned access is faster because the external bus to memory is not a single byte wide - it is typically 4 or 8 bytes wide (or even wider). This means that the CPU doesn't fetch a single byte at a time - it fetches 4 or 8 bytes starting at the requested address. As a consequence of this, the 2 or 3 least significant bits of the memory address are not actually sent by the CPU - the external memory can only be read or written at addresses that are a multiple of the bus width. If you requested a byte at address "9", the CPU would actually ask the memory for the block of bytes beginning at address 8, and load the second one into your register (discarding the others).
This implies that a misaligned access can require two reads from memory: If you ask for 8 bytes beginning at address 9, the CPU must fetch the 8 bytes beginning at address 8 as well as the 8 bytes beginning at address 16, then mask out the bytes you wanted. On the other hand, if you ask for the 8 bytes beginning at address 8, then only a single fetch is needed. Some CPUs will not even perform such a misaligned load - they will simply raise an exception (or even silently load the wrong data!).
内存对齐对于不同方面的性能都很重要。它有与硬件相关的原因。自 80 年代以来，CPU 和内存之间的访问时间存在差异。处理器的速度增长速度快于存储器的速度。随着时间的推移，这种差异越来越大（举个例子：在 Apple II 上，CPU 的频率为 1.023 MHz，内存的频率是该频率的两倍，CPU 1 个周期，视频 1 个周期。现代 PC 的工作原理CPU 频率约为 3GHz，内存频率仅为 400MHz）。解决内存速度变慢问题的一种解决方案是在更宽的总线上访问它，而不是一次访问 1 个字节，CPU 将从内存中读取 64 位宽的字。这意味着即使您从内存中读取 1 个字节，总线也会传输整个 64 位（8 字节字）。存储器将在地址 0、8、16、24、32、40 等处具有这些 8 字节单元。8 的倍数。例如，如果您访问地址 4 处的 8 字节字，则硬件将必须读取该字在地址0处，屏蔽该字的高4字节，然后读取地址8处的字，屏蔽该字的低部分，将其与前半部分组合并将其提供给寄存器。正如您所看到的，这是一个相当复杂（因此很慢）的操作。这是人们喜欢对齐内存访问的第一个原因。 2小时后我会给出另一个理由。
The memory alignment is important for performance in different ways. It has a hardware related reason. Since the 80s there is a difference in access time between the CPU and the memory. The speed of the processor is growing faster than the speed of the memory. This difference is getting bigger and bigger over time (to give an example: on the Apple II the CPU was at 1.023 MHz, the memory was at twice that frequency, 1 cycle for the CPU, 1 cycle for the video. A modern PC works at about 3GHz on the CPU, with a memory at barely 400MHz). One solution to the problem of ever slowing memory, is to access it on ever wider busses, instead of accessing 1 byte at a time, the CPU will read a 64 bit wide word from the memory. This means that even if you read 1 byte from memory, the bus will deliver a whole 64bit (8 byte word). The memory will have these 8 byte units at address 0, 8, 16, 24, 32, 40 etc. A multiple of 8. If you access, for example an 8 byte word at address 4, the hardware will have to read the word at address 0, mask the high 4 bytes of that word, then read word at address 8, mask the low part of that word, combine it with the first half and give that to the register. As you can see a quite complicated (thus slow) operation. This is the first reason one likes aligned memory access. I will give another reason in 2 hours.
“X字节对齐”意味着数据的基址必须是X的倍数。它可以用于使用一些特殊硬件，例如某些特殊硬件中的DMA，以便CPU更快地访问等等...
它在单元处理器的情况下，数据必须按 16 字节对齐才能复制到协处理器或从协处理器复制。
"X bytes aligned" means that the base address of your data must be a multiple of X. It can be used for using some special hardware like a DMA in some special hardware, for a faster access by the cpu, etc...
It is the case of the Cell Processor where data must be 16 bytes aligned in order to be copied to/from the co-processor.
如果内存数据是8字节对齐的，则意味着：
一般在C语言中，如果一个结构体被提出是8字节对齐的，那么它的大小必须是8的乘积，如果不是，则需要手动或由编译器进行填充。一些编译器提供指令来使结构体与 n 字节对齐，对于 VC，它是
#pragma pack(8)，对于 gcc，它是__attribute__((aligned(8)))。If the memory data is 8 bytes aligned, it means:
Generally in C language, if a structure is proposed to be 8 bytes aligned, its size must be multiplication of 8, and if it is not, padding is required manually or by compiler. some compilers provide directives to make a structure aligned with n bytes, for VC, it is
#pragma pack(8), and for gcc, it is__attribute__((aligned(8))).