linux系统调用机制的疑惑
我们使用“int”或新的“syscall/sysenter”指令从ring3 转移到ring0。这是否意味着需要为内核修改的页表和其他内容由“int”指令自动完成，或者“int 0x80”的中断处理程序将执行所需的内容并跳转到相应的系统调用。
此外，当从系统调用返回时，我们再次需要进入用户空间。为此，我们需要知道用户空间中的指令地址以继续用户应用程序。该地址存储在哪里。 “ret”指令是否自动将环从ring3更改为ring0，或者此环更改机制在何处/如何发生？
然后，我了解到从ring3更改为ring0并不像从ring0更改为ring3那么昂贵。为什么会这样？？
谢谢， 巴拉
We transit from ring3 to ring0 using 'int' or the new 'syscall/sysenter' instruction. Does that mean that the page tables and other stuffs that needs to be modified for the kernel is automatically done by the 'int' instruction or the interrupt handler for the 'int 0x80' will do the required stuff and jump to the respective system call.
Also when returning from a system call, we again need to go to user space. For this we need to know the instruction address in the user space to continue the user application. Where is that address stored. Does the 'ret' instruction automatically changes the ring from ring3 to ring0 or where/how this ring changing mechanism takes place?
Then, i read that changing from ring3 to ring0 is not as costly as changing from ring0 to ring3. Why is this so??
Thanks,
Bala
如果你对这篇内容有疑问，欢迎到本站社区发帖提问 参与讨论，获取更多帮助，或者扫码二维码加入 Web 技术交流群。
绑定邮箱获取回复消息
由于您还没有绑定你的真实邮箱，如果其他用户或者作者回复了您的评论，将不能在第一时间通知您！
发布评论
评论（1）
切换到内核模式时，页表不会更改 - 虚拟地址空间的内核部分被简单地标记为只能在ring0中访问，因此它就变得可以访问。当内核改变当前进程时，它也会改变页表。
int 0x80指令由陷阱门提供服务，它以 CS:EIP 对的形式提供处理器跳转到的地址。新的 CS（代码段选择器）包括 CPL（当前特权级别）0，这会影响到 Ring0 的转换。由于从ring3到ring0的转换，处理器还从TSS（任务段选择器）中获取SS:ESP的新值，并将旧值保存在TSS中。这将从用户模式堆栈切换到内核堆栈。
然后将之前的 CS:EIP 压入内核堆栈（这是用户空间中的返回地址）。由于 int 0x80 指令本身，所有这些都是由处理器完成的。
IRET 指令可用于返回用户空间 - 它从内核堆栈中弹出 CS:EIP。由于 CS 的 CPL 为 3，因此处理器将切换回ring3，这会导致它也切换回ring3 堆栈。
The pagetables aren't changed when switching to kernel mode - the kernel part of the virtual address space is simply marked as only being accessible in ring0, so it just becomes accessible. The kernel changes pagetables when it changes the current process.
The
int 0x80instruction is served by a trap gate, which supplies the address for the processor to jump to as a CS:EIP pair. The new CS (code segment selector) includes a CPL (current privilege level) of 0, which effects the transition to ring0.Due to the transition from ring3 to ring0, the processor also picks up new values for SS:ESP from the TSS (task segement selector), and saves the old ones in the TSS. This switches from the user mode stack to the kernel's stack.
The previous CS:EIP are then pushed onto the kernel stack (this is the return address in user space). All of this is done by the processor due to the
int 0x80instruction itself.The
IRETinstruction can be used to return to userspace - it pops the CS:EIP from the kernel stack. Since the CS includes a CPL of 3, the processor is switching back to ring3, which causes it to switch back to the ring3 stack as well.