没有依赖关系表达式的 Makefile 规则
我在维基百科上阅读了关于“Make”的德语文章,发现了以下两行:
.c.o:
$(CC) $(CFLAGS) -c -o $@ $<
为什么省略了依赖表达式以及为什么目标使用双文件扩展名?
I read the german article about "Make" on Wikipedia and found the following 2 lines:
.c.o:
$(CC) $(CFLAGS) -c -o $@ lt;
Why is the dependency expression left out and why does the target use a double file extension?
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这实际上是定义了一个后缀规则...它定义了如何从以“.c”结尾的相应文件构建以“.o”结尾的文件,这告诉 make 推断“filename.c”(如果存在)是一个对于任何此类文件名,“filename.o”的依赖关系,并且“filename.o”文件可以使用所提供的规则从其 *.c 依赖关系构建。
不过,我应该指出,这一行是完全没有必要的,事实上,人们不应该将其放入 Makefile 中,因为 Make 已经能够推断出这种类型的依赖关系。您可能对我的Makefile 教程感兴趣 随着它的详细展开,Make 能够推断出所有的事情。
This is actually defining a suffix rule... it is defining how to build a file ending in ".o" from a corresponding file ending in ".c", which tells make to infer that "filename.c", if it exists, is a dependency for "filename.o" for any such filename, and that the "filename.o" file may be built from its *.c dependency with the provided rule.
I should point out, though, that this line is completely unnecessary and is, in fact, not something one should put in a Makefile, since Make is already capable of deducing that type of dependency. You may be interested in my Makefile tutorial as it goes on in quite some detail all the things Make is capable of inferring.
这就是所谓的“后缀规则”,用于从具有第一个后缀的源创建具有第二个后缀的目标,只要已知后缀即可。请参阅
make
手册中的后缀规则< /a> 更详细的描述That is what is called a 'Suffix Rule', and is used to make a target with the second suffix from a source with the first suffix, as long as the suffixes are known to make. See Suffix Rules in the
make
manual for a more detailed description