是不是每个机器码只能映射到一个汇编代码？
假设这两者本质上是相同的：
push 1
并且
0x1231
其中表示每个汇编指令映射到机器代码。
但是否每个机器码只能映射到一个汇编代码呢？
Suppose these two are essensially the same:
push 1
and
0x1231
Which says each assembly instruction maps to a machine code.
But is it necessary that each machine code can only map to one assembly code?
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MIPS汇编语言有几个“伪指令”。例如，“move”在内部只是一个带有隐式 $0 操作数的“add”。
MIPS assembly language has several "pseudoinstructions". For example, "move" is internally just an "add" with an implicit $0 operand.
您可以完美地定义一个支持指令“同义词”的汇编程序：如果您让用户编写与
BAR含义完全相同的FOO，也不会造成任何损害。我不知道有哪些汇编程序可以做到这一点，但是您肯定可以在任何宏汇编程序中使用一个简单的宏来实现相同的效果；-)。You could perfectly well define an assembler program that supports "synonyms" for instructions: no harm is done if you let the user code
FOOmeaning exactly the same asBAR. I don't know offhand of assemblers that do that, but you can certainly achieve the same effect with a trivially simple macro in any macro-assembler;-).是的。一个真实的例子是 68k 汇编器，其中
Yes. A real-world example of this is 68k assembler, where
即使没有同义词，一条汇编指令也可以映射到多个机器代码。
例如
add eax, ebx可以表示为03 C3或01 D8。事实上，这可能很有用，例如识别特定的编译器。
您可以在本文中找到更多示例。
在某种程度上，反之亦然。
该示例有点牵强，但相同的机器代码 (
F3 90) 在 x86 上映射到REP NOP或PAUSE。< br>执行哪一个取决于代码运行的 CPU。
尽管特意选择了相同的操作码，并且就处理器状态而言，它们没有区别，执行时间 - 以及确切内部实现 - 在 HT (PAUSE) 与非 HT (NOP) 上可能有所不同） 中央处理器。
除了
PAUSE与REP NOP没有什么区别外，可以编写难以静态反汇编的机器代码。例如，如果反汇编从偏移量 0 与偏移量 1 开始，则可以仔细构造一个机器代码序列，该序列会产生完全不同的汇编指令。
人们还可以编写自修改汇编代码以使静态分析变得更加困难。
Even without synonyms, an assembly instruction can map to more than one machine codes.
E.g.
add eax, ebxcan be represented as either03 C3or01 D8.In fact, this can be useful, e.g. to identify particular compilers.
You can find more examples in this article.
The reverse can also be true, in a way.
The example is a bit far-fetched, but the same machine code (
F3 90) maps to eitherREP NOPorPAUSEon x86.Which one is executed, depends on the CPU the code runs on.
Although the same opcode was chosen deliberately and as far as the processor state is concerned, they make no difference, the execution time - and the exact internal implementation - can differ on a HT (PAUSE) vs non-HT (NOP) CPU.
Apart from the
PAUSEvsREP NOPthat makes little difference, it is possible to write machine code that is hard to disassemble it statically.E.g. one can carefully construct a machine code sequence that results in completely different assembly instructions if the disassembly starts at say offset 0 vs offset 1.
One can also write self-modifying assembly code to make static analysis harder.
我看不出有任何概念上的原因可以解释为什么您不能设计一种汇编语言，其中多个汇编语句映射到底层处理器上的相同操作码。
我也没有立即看到任何特别好的理由这样做，但已经晚了，也许我错过了一些东西。
I don't see any conceptual reason why you couldn't design an assembly language wherein more than one assembly statement map to the same opcode on the underlying processor.
I also don't immediately see any particularly good reason to do that, but it's late and maybe I'm missing something.
特定机器代码指令的作用由它所针对的处理器（或处理器系列）决定。相同的机器代码指令总是会做基本相同的事情。
通常，特定的机器代码指令将反汇编为仅一条语句。在一些更复杂的指令集中，有多种方法可以在汇编程序中编写相同的表达式。一个很好的例子是索引查找。有些语句也可以有同义词，但对于处理器来说仍然意味着相同的事情。
然而，一个体系结构可能存在多个完整的程序集集。 x86 架构就发生过这种情况，其中有 Intel 定义的标准集，还有另一个基于 AT&T 创建的标准集，GCC 使用的是该标准集。
What a particular machine code instruction does is dictated by the processor (or processor family) it is for. And the same machine code instruction will always do fundamentally the same thing.
Normally, a particular machine code instruction will dis-assemble to only one statement. In some more complex instruction sets, there are several ways to write the same expression in assembler. A good example is indexed lookups. Some statements can also have synonyms but again, will still mean the same thing to the processor.
However, it is possible for multiple whole assembly sets to exist for an architecture. This has happened for the x86 architecture where there is the standard set as defined by Intel, and then there's another based on one created by AT&T, which his is the one used by GCC.
一般来说，汇编的目的是允许您直接对机器进行编程，而不会不清楚要执行的内容。这几乎需要 1:1 映射。
如果在某些汇编器中的某个地方有一些间接映射可能用于处理某些处理器系列中操作码的更改，我不会感到惊讶。但我什么都不知道。
Generally the point of assembly is to allow you to directly program the machine without an ambiguity on what will be executed. The pretty much requires a 1:1 mapping.
I wouldn't be surprised if somewhere in some assembler there are some indirect mappings probably to deal with changes to opcodes in some line of processors. I don't know of any though.