make，继承子目录Makefile中的规则

发布于 2024-08-23 16:39:15 字数 672 浏览 3 评论 0原文

我想在我的项目目录中建立一个 Makefile 系统，以便在其中定义的规则将在其他目录中定义。举例来说，我有一个名为“test”的目录，里面是“test.c”，但我想使用根目录中 Makefile 中定义的规则构建 test.c

这是一个示例

#Makefile (inside base dir)
 %.o: %.c
   gcc -Wall -c $^

 all:
  make -C test out.a

#test/Makefile
 out.a: test.o
  ar rcs $@ $^

#test/test.c
 int main() {
   return 0;
 }

#inside root dir
$make
make -C test
make[1]: Entering directory `test'
cc    -c -o test.o test.c
/usr/ucb/cc:  language optional software package not installed
make[1]: *** [test.o] Error 1
make[1]: Leaving directory `test'
make: *** [all] Error 2

请注意它如何调用 cc 而不是我的规则使用根 makefile 中定义的 gcc。

总之，我不想在每个 Makefile 中定义相同的规则

原文

I want to set up a system of Makefiles in my project directories so that the rules defined in one will be defined in others. Let's say for example I have a directory called "test" and inside is "test.c" but I want to build test.c using a rule defined in a Makefile in the root directory

Here is an example

#Makefile (inside base dir)
 %.o: %.c
   gcc -Wall -c $^

 all:
  make -C test out.a

#test/Makefile
 out.a: test.o
  ar rcs $@ $^

#test/test.c
 int main() {
   return 0;
 }

#inside root dir
$make
make -C test
make[1]: Entering directory `test'
cc    -c -o test.o test.c
/usr/ucb/cc:  language optional software package not installed
make[1]: *** [test.o] Error 1
make[1]: Leaving directory `test'
make: *** [all] Error 2

Notice how it invokes cc instead of my rule using gcc defined in the root makefile.

In summary, I don't want to have to define the same rule in each Makefile

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