Makefile 构建目录和依赖项列表

发布于 2024-08-23 12:17:27 字数 672 浏览 11 评论 0原文

在 makefile 中,我在 build 目录中构建所有 .o 文件:

program: class1.o class2.o class3.o
    g++ $(BUILDDIR)class1.o $(BUILDDIR)class2.o $(BUILDDIR)class3.o -o $@

生成 $(BUILDDIR)class1.o $(BUILDDIR)class2.o $(BUILDDIR) 会很酷依赖项列表中的 class3.o...

我知道 $^ 会给我所有依赖项的列表,用空格分隔,但我无法处理子目录。

是否可以 ?

如果我有program: class1.o class2.o class3.o configure,我可以从列表中排除configure吗?

谢谢:)

编辑:迈克尔的解决方案运行良好,但是这样做,make找不到依赖项,并且每次都必须构建所有内容...难道没有更简单的方法吗?方式,当制定诸如程序:class1.o class2.o class3.o之类的隐式规则时,告诉它将二进制文件放入构建中目录?

In a makefile, I build all my .o files in a build directory:

program: class1.o class2.o class3.o
    g++ $(BUILDDIR)class1.o $(BUILDDIR)class2.o $(BUILDDIR)class3.o -o $@

It would be cool to generate $(BUILDDIR)class1.o $(BUILDDIR)class2.o $(BUILDDIR)class3.o from the dependencies list...

I know that $^ would give me the list of all dependencies, separated by spaces, but I can't deal with the sub-directory.

Is it possible ?

And if I have program: class1.o class2.o class3.o configure, can I exclude configure from the list ?

Thank you :)

Edit: Michael's solutions works well, but doing that, make does not find the dependencies and has to build everything everytime... Isn't there a simpler way, when making implicit rules like program: class1.o class2.o class3.o, to tell it to put the binaries in a build directory ?

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孤檠 2024-08-30 12:17:27

g++ $(addprefix $(BUILDDIR), $^) -o $@

应该这么做。

Make 手册在第 8.3 节中列出了这些函数。

Off the top of my head

g++ $(addprefix $(BUILDDIR), $^) -o $@

should do it.

The Make manual has a list of these functions in section 8.3.

坦然微笑 2024-08-30 12:17:27

您已经发现了 Make 的两个(或者可能是三个)重大缺点。它擅长使用文件there来创建文件here,但反之则不然,如果规则创建了与确切目标不同的内容(并且它是自动的),那么它会感到困惑变量应该在先决条件下工作,但事实并非如此)。幸运的是,我们可以解决这些问题。

当您使用 Michael Kohne 的解决方案时,Make 找不到先决条件,因为它正在寻找 class1.o,而不是 $(BUILDDIR)class1.o。 (如果你只是告诉它使用 VPATH 在 $(BUILDDIR) 中查找,你可能会遇到其他问题。)

最简单、最粗暴的解决方案(如果你不太有经验,我建议你这样做)是蛮力:

NAMES = class1 class2  
OBJECTS = $(patsubst %,$(BUILDDIR)%.o,$(NAMES))

program: $(OBJECTS) configure
    g++ $(OBJECTS) -o $@

$(OBJECTS):$(BUILDDIR)%.o:%.cc
    g++ -c $^ -o $@

有更优雅的方法使用更先进技术的解决方案,但目前应该可以。

You've hit on two (or maybe three) of the big shortcomings of Make. It's good at using files there to make files here, but not the other way around, and it gets confused if a rule makes something other than the exact target (and it's automatic variables should work in prerequisites, but they don't). Fortunately we can get around these problems.

Make can't find the prerequisites when you use Michael Kohne's solution because it's looking for class1.o, not $(BUILDDIR)class1.o. (And if you simply tell it to look in $(BUILDDIR) using VPATH, you may run into other problems.)

The simplest, crudest solution (which I recommend if you're not too experienced) is brute force:

NAMES = class1 class2  
OBJECTS = $(patsubst %,$(BUILDDIR)%.o,$(NAMES))

program: $(OBJECTS) configure
    g++ $(OBJECTS) -o $@

$(OBJECTS):$(BUILDDIR)%.o:%.cc
    g++ -c $^ -o $@

There are more elegant solutions using more advanced techniques, but this should do for now.

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